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5 дней назад

Process Engineer Intern, MS - Summer 2027 (Advanced Packaging)

37 - 73$
Формат работы
onsite
Тип работы
fulltime
Грейд
trainee
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Process Engineer Intern, MS - Summer 2027 (Advanced Packaging): Supporting 2.5D/3D chip-on-wafer assembly and co-packaged optics development for AI silicon with an accent on packaging data analysis, NPI risk tracking, and manufacturing readiness. Focus on analyzing packaging-build trends, documenting mitigation plans, and contributing to design-for-manufacturing, reliability, and cost-tradeoff discussions.

Location: Santa Clara, CA, United States

Expected base pay: $37–$73 per hour, plus potential bonus, equity, and additional compensation for intern PhD candidates.

Company

hirify.global develops semiconductor solutions for enterprise, cloud and AI, and carrier data infrastructure.

What you will do

  • Support process development for 2.5D/3D chip-on-wafer assembly and co-packaged optics with foundry and OSAT partners.
  • Track and analyze packaging-build data to identify trends and potential risks during the New Product Introduction phase.
  • Document risks and mitigation plans as products progress toward high-volume manufacturing readiness.
  • Participate in partner and internal meetings covering design-for-manufacturing, process development, reliability, and cost trade-offs.
  • Prepare reports summarizing technical progress and communicate findings to cross-functional audiences.

Requirements

  • Currently enrolled in a master's degree program in Materials Science, Chemical Engineering, Mechanical Engineering, Chemistry, Physics, or a related field, with expected graduation from Fall 2027 through Summer 2028.
  • Coursework or academic project experience in semiconductor processing, materials science, or packaging and assembly technologies.
  • Familiarity with data analysis and organization using Excel, JMP, or Minitab.
  • Strong written and verbal communication skills, independent working ability, and the ability to manage multiple tasks in a fast-paced environment.
  • Basic understanding of reliability testing or failure analysis concepts.
  • Applicants must be eligible to access export-controlled technology and software under applicable U.S. regulations; export license review may be required.

Nice to have

  • Exposure to 2.5D/3D chip-on-wafer assembly or co-packaged optics through coursework, research, or internship experience.
  • Familiarity with programming or scripting languages such as Python for data analysis.
  • Prior internship or research experience in semiconductor, manufacturing, or process engineering.

Culture & Benefits

  • Hands-on learning in advanced semiconductor assembly and packaging technologies for AI products.
  • Medical, dental, and vision coverage for interns.
  • Mental health resources, paid holidays, perks, and discounts.
  • Eligibility for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.

Hiring process

  • Interviews evaluate individual experience, thought process, and communication skills in real time.
  • AI tools, transcription apps, automated answer generators, and automated note-taking bots are not permitted during interviews.

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