Package Architecture Analyst (Semiconductor Packaging)

Location: Hybrid role based at an Intel site in Hillsboro, Oregon, or Phoenix, Arizona, United States, with time split between on-site and off-site work.

Annual salary: $190,610–$269,100 USD, with individual compensation determined by location, skills, experience, and education.

Company

Semiconductor packaging organization focused on advanced packaging solutions across silicon, hardware, and manufacturing.

What you will do

• Translate product requirements into package architecture specifications.
• Lead trade-off decisions across electrical, mechanical, thermal, reliability, and cost requirements.
• Collaborate with silicon, hardware, package, and manufacturing leads to resolve technical roadblocks.
• Oversee package design, development processes, production readiness, and tape-out preparation.
• Apply Design for Manufacturing principles to improve manufacturability, quality, and production efficiency.
• Troubleshoot package design and manufacturing issues while maintaining technical documentation.

Requirements

• Bachelor's degree in Mechanical Engineering, Electrical Engineering, Materials Science, or a related field with 9+ years of hands-on experience; or a master's degree with 6+ years; or a PhD with 4+ years.
• At least 4 years of experience defining semiconductor or electronic package architectures and developing technical documentation.
• Experience applying Design for Manufacturing principles.
• Experience using Design of Experiments methodologies.
• Experience troubleshooting package design and manufacturing issues.
• Strong analytical, communication, problem-solving, and cross-functional collaboration skills.

Nice to have

• Advanced understanding of semiconductor packaging technologies and industry trends.
• Experience leading cross-disciplinary technical teams.

Culture & Benefits

• Hybrid work model combining on-site and off-site work.
• Competitive pay and stock bonuses.
• Health, retirement, and vacation benefits.
• Cross-functional collaboration across silicon, hardware, and manufacturing teams.