Principal Engineer-Analog Design RF (RFIC)

Location: Heilbronn, Germany

Company

hirify.global is a global semiconductor company developing technologies and products for wireless and other embedded applications.

What you will do

• Design RFIC blocks and modules, including RF synthesizers, VCOs, LO generation, transmitter and receiver chains, baseband blocks, and biasing circuits.
• Own schematic design and simulation to meet performance, area, and power targets.
• Supervise layout and collaborate with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies.
• Translate radio and product requirements into block-level budgets and circuit specifications with the system design team.
• Supervise validation and debugging, including lab bring-up, bench measurements, simulation correlation, and silicon root-cause analysis.
• Collaborate with foundry technology teams on PDKs, models, transistor and passive-device behavior, and reliability constraints.

Requirements

• Ph.D. in Electrical Engineering or a related field with 5+ years of RF/analog CMOS IC design experience, or an M.S. with 7.5+ years of experience.
• Experience designing RF transmitter and receiver chains and/or RF PLLs and synthesizers.
• Strong understanding of RF analog IC design, CMOS transistors, inductor physics, noise, linearity, parasitics, device non-idealities, and on-chip matching networks.
• Extensive product-level tape-out experience and knowledge of IC layout and packaging effects, including crosstalk, noise coupling, and isolation techniques.
• Hands-on IC test and debugging experience with spectrum and network analyzers, signal generators, oscilloscopes, and related RF lab equipment.
• Proficiency with Cadence Virtuoso, Spectre/SpectreRF, PeakView, or similar electromagnetic modeling tools.

Culture & Benefits

• Work within a global, cross-functional Wireless IP Design Group.
• Collaborative environment built around trust, empowerment, respect, diversity, and communication.
• Access to leadership and employee development programs.
• Travel expectation of 0–25%.