15 часов назад
Neuromorphic Front-End Silicon Lead (AI)
220 920 - 311 890$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Neuromorphic Front-End Silicon Lead (AI): Leading the design, verification, integration, and post-silicon validation of neuromorphic chiplets and IP for physical AI systems with an accent on processor and accelerator architectures, SoC integration, and high-speed interfaces. Focus on translating neuromorphic concepts into manufacturable microarchitectures, co-designing critical memories and circuits, and guiding teams through tape-out and silicon bring-up.
Location: Hybrid work model with on-site work at assigned sites in Hillsboro, Oregon; Phoenix, Arizona; Folsom or Santa Clara, California; or Austin, Texas, United States
Annual salary: $220,920–$311,890 USD
Company
's Neuromorphic Computing Lab develops brain-inspired computing architectures, algorithms, software, and research chips for physical AI systems.
What you will do
- Translate hardware innovations from architects and AI researchers into implementable microarchitectures.
- Lead design implementation and verification teams through post-silicon validation.
- Prototype blocks through place-and-route and co-design critical custom circuits and memories.
- Evaluate, select, and integrate internal and external IP, including I/O interfaces.
- Partner with software and systems teams on pre-tape-out development and post-silicon bring-up.
- Mentor engineers and improve design and verification practices as the program scales.
Requirements
- MS in Electrical or Computer Engineering, Computer Science, or a related field.
- 10+ years of hands-on experience designing processors, accelerators, SoCs, or custom ASICs.
- 5+ years of RTL design experience with Verilog/SystemVerilog and modern ASIC flows, including synthesis, timing closure, CDC/RDC, formal verification, and DFV.
- 3+ years of experience leading silicon design or verification teams.
- Experience with SoC integration and high-speed interfaces such as Ethernet, PCIe/UCIe, and memory controllers.
- Consent to and successful completion of an extended background investigation is required for this Position of Trust.
Nice to have
- PhD and research experience in hardware acceleration, especially AI.
- Experience with chiplets, UCIe, advanced packaging, and 2.5D/3D heterogeneous integration.
- Experience with asynchronous design, custom memory and circuit co-design, emulation, or FPGA prototyping.
- Experience with UPF low-power methods, Root of Trust, secure boot, and multiple product tape-outs.
Culture & Benefits
- Hybrid work model combining on-site and off-site work.
- Competitive pay with stock bonuses.
- Health, retirement, and vacation benefits.
- Collaboration with a global ecosystem of more than 250 research groups.
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