Назад
Company hidden
4 дня назад

Principal ASIC Integration Engineer

Формат работы
remote (Global)
Тип работы
project
Грейд
senior
Английский
b2
Страна
US/Europe
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Principal ASIC Integration Engineer (ASIC/SoC): Leading ASIC architecture and integration for high-volume, cost-sensitive electronic products with an accent on system-level trade-offs, third-party semiconductor IP, manufacturing readiness, and yield optimization. Focus on selecting process nodes and PDKs, optimizing die size and packaging, analyzing production yields and silicon test data, and building supply-chain resilience through tape-out and production.

Location: Fully remote within EU countries; candidates based in the US may also be considered. Regular travel to Denmark, potentially several times per month, is required, with periodic travel to the US, other European countries, and Asia.

Company

hirify.global, operating through Avenga, provides global business and technology advisory, enterprise solutions, managed services, product development, and software development.

What you will do

  • Define ASIC requirements and specifications with electrical engineers and evaluate system-level architectural options.
  • Lead trade-off analyses across performance, power, die size, unit cost, manufacturability, yield, and production readiness.
  • Evaluate, select, and integrate third-party analog, compute, memory, and other semiconductor IP.
  • Guide process-node and PDK selection, floorplanning, die-size optimization, pin placement, packaging, and production-test strategies.
  • Collaborate with foundries, OSAT partners, IP vendors, test and validation engineers, and commercial stakeholders.
  • Analyze silicon test data and production-line yields to improve manufacturing outcomes and supply-chain resilience.

Requirements

  • At least 8 years of experience in ASIC microarchitecture, ASIC design, or SoC design within an electrical engineering environment.
  • Multiple successful ASIC or SoC tape-outs and experience across the complete development lifecycle.
  • Strong knowledge of ASIC and SoC architecture, microarchitecture, semiconductor foundry processes, process nodes, and PDKs.
  • Hands-on experience with third-party semiconductor IP evaluation and integration, including analog, compute, and memory IP.
  • Knowledge of packaging, assembly, testing methodologies, fault coverage, production-test optimization, yield analysis, and semiconductor unit-cost drivers.
  • Availability for regular international business travel, particularly to Denmark.

Nice to have

  • Experience working with OSAT partners and semiconductor supply-chain stakeholders.
  • Experience applying Design-for-Cost, Design-for-Manufacturing, Design-for-Assembly, and Design-for-Yield principles.

Culture & Benefits

  • Fully remote work arrangement within the EU.
  • International engineering project with cross-functional collaboration.
  • Equal opportunities in recruitment, career development, and leadership.
  • Engagement expected to last at least one year, with a possible one-year extension.

Hiring process

  • Submit a CV describing core skills and career interests.
  • Attend a talent call followed by a technical interview.
  • Some roles include a customer interview before an offer.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →