Назад
Company hidden
7 дней назад

Analog Layout Lead (Photonics)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Analog Layout Lead (Photonics): Leading full-custom analog and mixed-signal layout for next-generation silicon platforms with an accent on advanced CMOS implementation, parasitic-aware design, and physical verification. Focus on driving tape-out readiness, defining scalable layout methodologies, and integrating analog IP into complex mixed-signal SoCs.

Location: San Jose, United States

Company

hirify.global is a well-funded photonics startup building optical interconnects and photonic engines for AI supercomputing infrastructure.

What you will do

  • Lead full-custom layout for complex analog and mixed-signal blocks, including PLLs, ADCs, DACs, LDOs, bandgaps, and high-speed I/O.
  • Define analog layout methodologies, design rules, and best practices for matching, shielding, noise isolation, and signal integrity.
  • Collaborate with circuit designers on schematic translation, layout constraints, parasitic extraction, and post-layout analysis.
  • Own physical verification closure, including DRC, LVS, antenna checks, and tape-out readiness across advanced process nodes.
  • Establish floorplanning and integration strategies for analog IP within larger mixed-signal SoCs.
  • Guide, mentor, and review layout engineers and contractors while coordinating methodology, quality, and delivery schedules.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
  • 8+ years of full-custom analog and mixed-signal layout experience for production silicon using advanced CMOS nodes, preferably 28nm or below.
  • 8+ years of hands-on experience with industry-standard layout tools such as Cadence Virtuoso.
  • Experience taking high-performance analog blocks from concept through tape-out, including PLLs, voltage regulators, data converters, or high-speed interfaces.
  • Experience collaborating with circuit design teams and managing, mentoring, and reviewing layout engineers and external contractors.

Nice to have

  • Experience with post-layout simulation, RC extraction, and back-annotated verification using Spectre or Calibre.
  • Experience evaluating process design kits and design rules for new process-node bring-up.
  • Analog layout experience for photonics, AI infrastructure, wearable, mobile, or IoT SoCs.
  • Experience with 3D stacking, advanced packaging layout, or reusable analog layout templates.

Culture & Benefits

  • Competitive salary based on experience.
  • Comprehensive health insurance and benefits package.
  • Professional development opportunities and certification support.
  • Access to advanced technology and cloud platforms.
  • Collaborative cross-functional environment within a Silicon Valley-headquartered team.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →