EDA Design Flow Development Engineer (EM/IR)

Location: Hybrid work model in the United States, with primary locations in Santa Clara, California and additional locations in Folsom, California; Hillsboro, Oregon; and Austin, Texas.

Annual salary: $141,910–$269,100 USD

Company

hirify.global develops semiconductor technologies and products, with a focus on advanced design and manufacturing.

What you will do

• Develop and maintain transistor-level electromigration and IR drop analysis flows for custom IPs, embedded memories, SRAMs, analog/mixed-signal interfaces, and high-performance custom macros.
• Build CAD methodologies and automation infrastructure for power integrity and transistor-level reliability verification.
• Develop SPICE-based verification and parasitic-aware reliability modeling flows.
• Correlate analysis results with silicon data to improve accuracy and scalability.
• Collaborate with circuit design, physical design, package, reliability, and signoff teams.

Requirements

• Bachelor’s degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 6+ years of experience; alternatively, 4+ years with a Master’s degree or 2+ years with a PhD.
• Knowledge of electromigration and power-drop reliability concepts.
• Experience with Redhawk and Totem tools.
• Understanding of CMOS circuit operation, power delivery networks, and SPICE simulation.
• Knowledge of parasitic extraction fundamentals and advanced-node design challenges.
• Scripting and automation skills in Linux environments.

Culture & Benefits

• Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
• Competitive pay and stock bonuses.
• Health, retirement, and vacation benefits.
• Work on semiconductor design and manufacturing technologies.