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Sr. EDA Tools Engineer - PERC ESD

149 600 - 284 580$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr. EDA Tools Engineer - PERC ESD (ESD/LU verification and semiconductor design technology): Developing PERC ESD rule decks, reliability methodologies, and verification automation for advanced process technologies with an accent on rule validation, QA automation, and cross-functional EDA tool development. Focus on debugging and signing off design rules, analyzing ESD/LU root causes, and driving practical solutions across design, reliability, CAD, and EDA vendor teams.

Location: On-site in Hillsboro, Oregon, United States

Annual salary: $149,600–$284,580 USD

Company

Intel develops semiconductor process technologies, packaging, manufacturing, and technology platforms supporting advanced products and AI-era computing.

What you will do

  • Develop ESD and latch-up rule decks aligned with design rules and reliability requirements.
  • Create and maintain ESD and latch-up design rule methodologies and specifications.
  • Collaborate with design, reliability, CAD, and external EDA vendor teams to define and implement tool features.
  • Build and execute test cases for rule debugging, validation, and signoff.
  • Define QA requirements and drive automation to improve the robustness and efficiency of rule checks.
  • Analyze ESD and latch-up design problems, identify root causes, and lead improvements to verification tools and methodologies.

Requirements

  • Master’s degree or PhD in Electrical Engineering or Computer Engineering.
  • At least 3 years of industry experience in physical design verification, reliability, device physics, process technology, design rules, extraction, or related areas.
  • At least 2 years of experience developing and debugging ESD PERC rule decks or runsets, or equivalent reliability/DRC tools.
  • At least 2 years of scripting experience with Python, Tcl, Perl, or similar languages for QA and flow automation.
  • Knowledge of ESD/LU PreSi models, including HBM and CDM, I/O design, and related methodologies.
  • Strong analytical, communication, leadership, and cross-functional collaboration skills.

Nice to have

  • Experience driving cross-functional, cross-site, or industry-wide initiatives and task forces.
  • Experience influencing internal and external stakeholders and driving technical issues to closure.

Culture & Benefits

  • On-site work model with Shift 1 in the United States of America.
  • Health, retirement, vacation, stock bonus, and other total compensation benefits.
  • Work within a worldwide manufacturing and technology organization.
  • Fast-paced, team-oriented environment focused on advanced semiconductor technologies.

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