Senior Analog IC Design Engineer

Location: Taipei, Taiwan; satisfactory proof of the right to work in Taiwan is required.

Company

hirify.global develops low-power programmable logic, FPGA, CPLD, and programmable power management solutions for global customers.

What you will do

• Design and simulate analog and mixed-signal IC circuit blocks from initial specifications through implementation.
• Collaborate with mask designers to deliver physical design and integrate analog/mixed-signal blocks into complex digital chips.
• Define bench-level test plans for post-silicon characterization.
• Perform post-silicon measurements, characterization, and debugging.
• Lead and mentor junior engineers.

Requirements

• Bachelor’s, master’s, or doctoral degree in electrical engineering or a related field.
• Multiple years of analog/mixed-signal circuit design experience: 10+ years with a BSEE, 8+ years with an MS, or 5+ years with a PhD.
• Design experience with several analog and mixed-signal circuits, including SerDes, low-jitter PLLs, oscillators, phase interpolators, ADC/DAC, high-speed clock distribution, bandgap/bias circuits, and voltage regulators.
• In-depth knowledge of transistor mismatch, linearity, stability, low-power, and low-noise techniques.
• Experience designing circuits in advanced FinFET technologies and using AMS design flows, including Cadence schematic capture, Virtuoso, Spectre, layout, and analog behavioral modeling.
• Strong problem-solving, communication, attention-to-detail, and collaboration skills.

Culture & Benefits

• Fast-paced, results-oriented environment with a team-first approach.
• International organization focused on R&D, product innovation, and customer service.
• Comprehensive compensation and benefits program.
• Background and reference checks are required.