1 день назад
Principal Engineer, SOC Design
219 000 - 351 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Principal Engineer, SOC Design (ASIC/RTL): Developing prototype and production memory and storage controllers for computing systems supporting machine learning, data analytics, and edge computing with an accent on SoC architecture, top-level integration, and RTL implementation. Focus on integrating ARM, DDR, and UCIe IP, validating designs through lint, CDC, STA, synthesis, and DFT, and managing PPA trade-offs through tape-out and silicon bring-up.
Location: Daily onsite presence is required at the San Jose or Folsom office in the United States.
Salary: $219,000–$351,000 USD base pay range annually, with additional incentive opportunities.
Company
develops memory and storage technologies for smartphones, electric vehicles, hyperscale data centers, IoT devices, and other computing systems.
What you will do
- Define architectures and own the microarchitecture of subsystems and chip-level designs.
- Lead top-level integration, logic design, RTL implementation, and design quality checks.
- Review and integrate third-party IP, including ARM cores, DDR controllers, and UCIe PHYs.
- Collaborate with architects and verification engineers to ensure sound SoC-level designs.
- Work with physical design teams on timing constraints, synthesis, DFT insertion, and static timing analysis.
- Develop prototype and production controllers that enhance memory and storage capabilities for machine learning, data analytics, and edge computing.
Requirements
- Bachelor’s degree with 20+ years of industry experience, master’s degree with 18+ years, or PhD with 15+ years in electrical engineering, computer science, or a related field.
- Hands-on experience with ASIC design flows from design through tape-out.
- Experience with ATE vector generation, testing, and silicon bring-up.
- Experience with commercial IP and interfaces such as UCIe, CPU, Ethernet, and DDR.
- Experience with SoC synthesis, timing analysis, lint, CDC checks, AMBA bus fabrics, and ARM cores.
- Understanding of performance, power, and area trade-offs, plus experience coordinating with third-party DFT, PI, and physical design service providers.
Culture & Benefits
- Inclusive and diverse workplace focused on innovation, collaboration, curiosity, and continuous learning.
- Medical, dental, vision, and 401(k) benefits.
- 4+ weeks of paid time off annually, plus holidays and sick leave.
- Family support benefits, including fertility and adoption stipends, medical travel support, and virtual veterinary care.
- Emotional wellness resources, including confidential therapy sessions and on-demand wellbeing apps.
- Onsite café and gym, virtual fitness classes, charitable giving match, and a flexible work environment within the onsite policy.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →
Похожие вакансии
5 дней назад
SoC Logic Design Engineer (SoC/RTL)
141 910 - 200 340$
1 день назад
SoC Development Engineer (ASIC/SoC)
134 000 - 201 000CAD
5 дней назад
DFT Implementation Engineer (Semiconductor)
141 910 - 200 340$
7 дней назад
Mixed Signal Digital Design Lead (ASIC)
121 900 - 195 000$
2 дня назад
IP Logic Design Engineer (3D NAND)
105 440 - 164 800$
5 дней назад
Senior EDA Tools Software Engineer
173 660 - 330 340$