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4 дня назад

Senior Staff, Systems Design Engineering (DRAM)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US/Taiwan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior Staff, Systems Design Engineering (DRAM): Ensuring the adoption, qualification, and lifecycle management of DRAM components in enterprise SSD products with an accent on DDR5 validation, reliability testing, and supplier-facing failure analysis. Focus on debugging HW–FW–system interactions, performing root-cause analysis, and improving engineering productivity through automation and AI-assisted tools.

Location: Onsite at the Tai Yuen Office in Hsinchu, Taiwan; secondary location: Milpitas Office, United States. Travel to global company sites and DRAM supplier locations is expected.

Company

A global flash memory and advanced storage technology company developing products that support data consumption, digital infrastructure, and global supply chains.

What you will do

  • Act as the senior technical interface for DRAM suppliers on product testing, validation, integration, and issue resolution.
  • Monitor and analyze ongoing reliability testing results for SSD drives.
  • Perform hands-on DRAM and system-level failure analysis and document corrective actions.
  • Collaborate with Systems Design and Supplier Quality Engineering teams to ensure DRAM component quality and performance.
  • Participate in supplier audits and maintain technical relationships through reviews.
  • Use automation, scripting, and AI-assisted tools to improve debugging, analysis, documentation, and engineering productivity.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or 12+ years of equivalent practical experience.
  • Hands-on experience with DRAM product and quality management, reliability, and failure analysis.
  • Strong understanding of memory technologies, system architecture, platform validation, and HW–FW–system interactions.
  • Strong knowledge of DDR5 interface architecture, protocols, training, validation, and debugging.
  • Strong knowledge of DDR controller architecture, configuration, performance tuning, operation, and failure analysis.
  • Experience with lab debugging, cross-functional root-cause analysis, technical leadership without formal people management, and clear technical documentation.

Nice to have

  • Fluent bilingual communication in English and Mandarin.
  • Experience working in global, supplier-facing environments.

Culture & Benefits

  • Inclusive environment focused on diversity, belonging, respect, and contribution.
  • Global collaboration across company sites and supplier locations.
  • Opportunities to work on reliable, enterprise-grade storage solutions.

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