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5 часов назад

Technical Staff Engineer - Verification (FPGA)

91 000 - 232 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Technical Staff Engineer - Verification (FPGA): Verifying next-generation, highly secure, low-power FPGA SoC products with an accent on constrained-random, formal, C-based, power-aware, and gate-level methodologies. Focus on developing reusable UVM environments, integrating AI/ML-enabled EDA flows, collaborating on emulation and hardware prototyping, and driving first-silicon success.

Location: Chandler, Arizona, United States

Annual base salary: $91,000–$232,000, plus restricted stock units and quarterly bonus payments.

Company

hirify.global is a large semiconductor technology company developing products and solutions that power systems worldwide.

What you will do

  • Verify complex subsystems and SoCs using constrained-random, formal, and C-based verification methodologies.
  • Develop and maintain reusable UVM-based test benches and verification environments.
  • Perform RTL, power-aware, gate-level, emulation, hardware prototyping, and post-silicon verification activities.
  • Apply AI/ML-enabled verification methodologies and contribute to tool automation and flow integration.
  • Collaborate with architecture, design, emulation, and hardware prototyping teams to establish unified verification methods and support first-silicon success.
  • Mentor junior verification engineers.

Requirements

  • 12.5+ years of functional verification experience with complex SoC designs.
  • Expertise in SystemVerilog, UVM, formal verification, methodology development, and tool automation.
  • Understanding of ARM or RISC-V SoC architectures and at least two relevant domains, such as CPU subsystems, PCIe, DDR, MIPI, Ethernet MAC, USB, or security and cryptography IP.
  • Experience with AI/ML-driven EDA tools, Python, TCL/TK, C/C++, and verification flow integration.
  • Exposure to FPGA-based acceleration platforms, simulation and emulation flows, hardware prototyping, and post-silicon debug.
  • BS or MS degree in Electrical or Electronic Engineering with 12+ years of experience.

Nice to have

  • Strong understanding of FPGA architecture.
  • Experience with ML-based coverage-driven verification optimizations.
  • Knowledge of the complete SoC RTL-to-GDS-to-silicon release flow.

Culture & Benefits

  • Health benefits begin on the first day of employment.
  • Retirement savings plans and an employee stock purchase program with a two-year look-back feature.
  • Competitive total compensation including base pay, restricted stock units, and quarterly bonuses.
  • Work with global cross-functional teams in an environment emphasizing employee development, collaboration, and values-based decision-making.
  • Travel requirement of 0%–25%.

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