High Speed IO Design Engineer (VLSI)

Location: Seoul Office, South Korea

Company

hirify.global develops Flash memory and advanced data storage technologies for consumers and businesses worldwide.

What you will do

• Design and analyze high-speed PHY and datapath architectures.
• Develop timing budgets and perform timing analysis for custom high-speed designs.
• Conduct signal integrity and power integrity analysis using models such as IBIS and SPF.
• Work with clock recovery schemes and high-speed interface protocols.
• Collaborate across disciplines and geographies while maintaining documentation, presentations, quality, and delivery timelines.

Requirements

• Bachelor’s or master’s degree in Electronics or Electrical Engineering.
• 5+ years of experience with high-speed interfaces and protocols including NAND Flash Toggle mode, ONFI, DDR3/4/5, LPDDR3/4/5, GDDR3/4/5/6, or HBM2/3/3E.
• Thorough understanding of high-speed PHY, datapath architectures, and clock-recovery schemes.
• Experience with Cadence Virtuoso, Synopsys Custom Compiler, HSPICE, Spectre, or FineSim, including statistical simulation methodologies.
• Strong analytical, communication, documentation, and presentation skills, with the ability to work in a multidisciplinary environment.

Nice to have

• Experience with mixed-mode simulation and analog/digital co-simulation.
• Experience creating EDA models such as Verilog models and Liberty files.

Culture & Benefits

• Inclusive environment focused on diversity, belonging, respect, and contribution.
• Commitment to accessibility throughout the application and hiring process.
• Full-time exempt position with compensation and benefits provided according to the role.