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5 дней назад

Signal Integrity Engineer

174 000 - 352 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Signal Integrity Engineer (ASIC PAM4 SerDes): Performing high-speed signal and power integrity analysis for networking products with an accent on 56G/112G SerDes, channel modeling, PCB timing, and measurement correlation. Focus on optimizing serial-link margins, tuning PAM4 parameters, designing SI rules, and correlating simulations with DVT measurements.

Location: Onsite at an HPE office; the listed US compensation is specific to California.

Salary: USD 174,000–352,500 annual base salary in California, United States. Variable incentives may also be offered.

Company

hirify.global is a global edge-to-cloud company developing networking, data, and application solutions.

What you will do

  • Perform COM channel-margin analysis across ASIC packages, boards, and connectors.
  • Develop PAM4 SerDes channel simulation models and correlate results with test structures and measurements.
  • Collaborate with component and ASIC vendors to improve model accuracy.
  • Perform PCB timing analysis and define, document, and implement signal-integrity layout rules and checklists.
  • Tune ASIC PAM4 SerDes parameters to improve serial-link design margins.
  • Conduct SI DVT measurements, debug board issues, and provide technical assessments to SI management.

Requirements

  • 10+ years of signal-integrity analysis experience with a bachelor's degree, or 8+ years with a master's degree, in electrical, computer, microwave, and/or RF engineering.
  • Required experience with 56G/112G ASIC PAM4 SerDes technologies.
  • Hands-on experience with serial channels up to 200G line rates, coefficient tuning, and TP1A measurements.
  • Strong ability to debug ASIC PAM4 SerDes and channel-performance issues.
  • Experience with system clocks, PLL design and debugging, and PCB stack-up design using 2D field solvers.
  • Strong communication, collaboration, and multitasking skills in a matrix organization.

Nice to have

  • Experience with 200G ASIC PAM4 systems.
  • Proficiency with Ansys HFSS, SIwave, ADS, Allegro, Sigrity, and MATLAB.
  • Experience with oscilloscopes, vector network analyzers, time-domain reflectometers, spectrum analyzers, and phase-noise analyzers.
  • Strong laboratory debugging skills.

Culture & Benefits

  • Comprehensive health, financial, and emotional wellbeing benefits.
  • Career development programs supporting technical expertise and internal mobility.
  • Inclusive workplace that values varied backgrounds and individual uniqueness.
  • Team collaboration across geographies and functions.

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