Analog IC Design Engineer (High-Speed)

Location: Stansted, United Kingdom. Hybrid working model with office attendance Monday through Thursday.

Company

hirify.global develops high-performance analog and mixed-signal semiconductor platforms for data centres, automotive, IoT, wireless infrastructure, communications, and passive optical networks.

What you will do

• Support chip development and take ownership of key analogue subsystems within high-speed IC programmes.
• Deliver circuit- and block-level analogue designs meeting performance, power, area, and reliability specifications.
• Collaborate with Layout Engineering on post-layout performance, parasitic awareness, and design optimisation.
• Support verification, validation, and bring-up by correlating simulated performance with laboratory measurements.
• Work with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to align designs with system requirements.
• Contribute to circuit innovation, design methodology improvements, technical reviews, and clear communication of engineering work.

Requirements

• Bachelor’s degree in Electrical Engineering or a related technical discipline.
• 0–2 years of relevant industry experience in Analog IC design.
• Strong understanding of CMOS/BiCMOS analogue circuit design principles and semiconductor device physics.
• Good grounding in circuit theory, device behaviour, and performance, power, and area trade-offs.
• Experience with Cadence design and simulation tools.
• Strong written and verbal communication skills in English.
• Structured thinking, attention to detail, collaborative working, constructive technical debate, self-motivation, and commitment to continuous learning.

Nice to have

• Master’s degree or specialised analogue IC design training.
• Exposure to RF or high-speed analogue design at 10GHz or above.
• Experience with laser driver and/or TIA circuit design.
• Understanding of RF/analogue layout principles, including floorplanning, parasitics, matching, ESD, crosstalk, and IR drop.
• Exposure to high-frequency passive design, including inductors and T-coils, and 3D modelling techniques.
• Knowledge of device modelling with Verilog-AMS, SystemVerilog, or equivalent.
• Understanding of DFM, yield optimisation, and semiconductor reliability principles.

Culture & Benefits

• Work within an IC development team based in Stansted and Ottawa.
• Contribute to next-generation high-speed IC products supporting data centres, 5G networks, and fibre-to-the-home applications.
• Access support, resources, and opportunities for technical development and career growth.
• Work in a multidisciplinary engineering environment with opportunities to present technical work and participate in design discussions.