3 часа назад
Associate-level FPGA Design Engineer (Quantum Computing)
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Associate-level FPGA Design Engineer (Quantum Computing) (Xilinx FPGA/SystemVerilog): Developing and verifying RTL and embedded code for real-time control systems supporting scalable quantum networking infrastructure with an accent on Xilinx Zynq and Ultrascale devices, ARTIQ Sinara hardware, and multidisciplinary hardware-software integration. Focus on designing hardware subsystems, debugging multi-node quantum networking systems, and automating verification, CI/CD, and release flows.
Location: Cambridge, UK; on-site
Company
commercialises quantum computing research from the Cavendish Laboratory and develops quantum photonic technology for scalable quantum networking infrastructure.
What you will do
- Design, develop, and verify RTL code for Xilinx Zynq and Ultrascale devices using SystemVerilog, Verilog, VHDL, and/or Migen.
- Develop and verify embedded code in C or Rust and real-time control systems using ARTIQ Sinara hardware.
- Collaborate with software, electronics, hardware, optical engineering, and physics specialists to define requirements and develop hardware subsystems.
- Debug multi-node quantum networking systems and contribute to tools that provide in-system visibility into real-time systems.
- Prepare design documentation, test plans, and technical reports.
- Automate tool flows, CI/CD pipelines, and release processes.
Requirements
- Proficiency in SystemVerilog, Verilog, and/or VHDL with a solid understanding of RTL design principles.
- Hands-on experience with Xilinx or Altera FPGA device families.
- Familiarity with SPI, I2C, Ethernet, and other hardware interfaces.
- Experience with testbenches, constrained-random verification, CDC checks, synthesis, and timing closure.
- Experience with scripting languages, preferably Python.
- Strong written and verbal communication skills, curiosity, and a proactive approach to learning.
Nice to have
- Experience with low-latency or real-time systems and Arm or RISC-V CPU subsystem debugging.
- Experience with embedded C or Rust, Cocotb, SystemVerilog Assertions, and formal verification workflows.
- Experience with RF signal generation and processing, DDS, RF communication protocols, and modulation techniques.
- Experience with high-speed DACs and ADCs, Linux, and mixed-signal applications.
Culture & Benefits
- Flexible working options within an on-site role.
- Private medical and dental cover, group death-in-service cover, and enhanced paid family leave.
- 28 days of annual leave including the company shutdown period, UK public holidays, and the option to purchase up to five additional days.
- One-month paid sabbatical after four years of service.
- On-site gym membership, cycle scheme, office refreshments, and access to Cambridge Botanical Gardens.
- Inclusive workplace with a focus on professional growth and diverse perspectives.
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