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18 часов назад

Optical Interconnect Process Engineer

121 000GBP
Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
UK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Optical Interconnect Process Engineer (Optical Packaging/CPO): Translating optical interconnect architectures into scalable, manufacturable, and reliable hardware with an accent on optical packaging, fiber alignment, process development, and production readiness. Focus on developing high-density optical assemblies, transferring novel microfabrication processes to manufacturing, and solving yield, reliability, and validation challenges for co-packaged optics.

Location: On-site in London, UK

Salary: From £121,000 per year

Company

Develops the hirify.global Decode Accelerator 1, a rack-scale AI accelerator using co-designed logic, data movement, packaging, optics, and interconnect technologies.

What you will do

  • Design and optimize high-density fiber-optic interconnects, including fiber-to-chip and fiber-to-package coupling, routing, multiplexing, and signal distribution.
  • Drive co-packaged optics integration at package and system level while addressing connectors, fixturing, alignment, thermal interactions, and opto-mechanical constraints.
  • Develop optical assembly, alignment, and test processes using Design for Manufacturing principles.
  • Collaborate with foundries, OSATs, contract manufacturers, R&D consortia, and tool vendors on capability development, pilot builds, process transfer, and production ramp.
  • Analyze tolerance sensitivities and yield drivers, investigate production issues, and execute validation plans for optical assemblies.
  • Ensure optical systems meet requirements for reliability, serviceability, field-replaceability, and high-volume manufacturing.

Requirements

  • Advanced micro-fabrication experience with deep process integration expertise.
  • Experience creating or modifying complete process flows for novel optoelectronic devices.
  • Background in photolithography, DRIE/RIE, thin-film deposition, wafer bonding, or wet etch.
  • Experience with DOE/SPC tools such as JMP or Python and disciplined process documentation.
  • B.Eng., M.Sc., Ph.D., or equivalent background in Materials Science, Electrical or Mechanical Engineering, Physics, or a related field.
  • Ability to work hands-on while also handling process architecture and partner coordination in interdisciplinary environments.

Nice to have

  • Familiarity with wafer-level packaging or flip-chip integration.
  • Experience transferring R&D processes to external pilot or production environments.
  • Working knowledge of FEM, profilometry, interferometry, L-I-V, or spectral testing.

Culture & Benefits

  • Meaningful stock options and equity participation.
  • Annual Living-Local Bonus for employees residing within 20 minutes of the office.
  • Employer-contributed retirement plans.
  • Compensation is adjusted based on experience, skills, and location.
  • Eligibility is subject to U.S. export control regulations; applicants with most recent citizenship or permanent residency in certain restricted countries may not be eligible, including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela.

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