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9 часов назад

Senior FPGA Compiler (Router) Engineer

144 600 - 209 300CAD
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior FPGA Compiler (Router) Engineer (FPGA/EDA): Developing and optimizing FPGA routing algorithms within compiler toolchains, with an accent on routability, timing closure, runtime, memory efficiency, and scalability. Focus on graph-based optimization, analyzing congestion and timing violations, integrating routing features, and solving complex design convergence challenges.

Location: Toronto, Ontario, Canada

Estimated salary range: 144.6K–209.3K CAD annually, plus performance-based incentive opportunities.

Company

hirify.global develops programmable FPGA solutions for AI, cloud computing, networking, and edge applications.

What you will do

  • Design, implement, and optimize FPGA routing algorithms for performance, routability, and timing closure.
  • Contribute to compiler flows covering placement, routing, and timing-driven optimization.
  • Improve runtime, memory efficiency, scalability, and convergence for large designs.
  • Investigate routing congestion, timing violations, and design bottlenecks.
  • Integrate routing features into compiler infrastructure and ensure robustness across customer use cases.
  • Collaborate with architecture, synthesis, static timing analysis, and hardware teams.

Requirements

  • 9+ years of experience in FPGA/ASIC design tools, EDA, or related fields.
  • Strong algorithms and data structures background, including graph algorithms and optimization techniques.
  • Experience with FPGA or ASIC flows, including placement, routing, and timing closure.
  • Proficiency in C/C++ and software development best practices.
  • Knowledge of routing algorithms, timing-driven design, and physical design concepts.
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

Nice to have

  • Experience with commercial FPGA toolchains such as Quartus or Vivado.
  • Knowledge of FPGA architectures and interconnect fabrics.
  • Experience with parallel or distributed computing for EDA workloads.
  • Scripting experience with Python or Tcl.
  • Background in timing analysis or placement algorithms.

Culture & Benefits

  • Work on compiler technology for next-generation FPGA platforms.
  • Solve complex algorithmic challenges at scale.
  • Collaborate with architecture, silicon, and software teams.
  • Performance-based incentive opportunities are available.
  • Canadian work experience is not required.
  • Applicants must be eligible for any required Canada export authorizations.

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