Senior ASIC Modeling Software Engineer

Location: US headquarters; on-site

Company

Builds high-performance infrastructure across silicon, systems, and networking for demanding artificial intelligence workloads.

What you will do

• Design and implement software models that simulate ASIC components including forwarding engines, schedulers, memory subsystems, and control-plane interfaces.
• Translate architectural and microarchitecture specifications into functionally or performance-accurate C++ models.
• Develop register models, memory maps, configuration interfaces, and packet-processing pipelines for multiple forwarding modes.
• Build models for current and next-generation ASICs, including systems with multiple interconnected chips.
• Optimize simulation performance and maintain configurable model architectures across multiple ASIC generations.
• Collaborate with RTL, architecture, SDK, and platform software teams on model-to-silicon correlation, architectural validation, and software enablement.

Requirements

• 7+ years of experience in C/C++ architecture model development, cycle-aware simulation, or ASIC verification.
• Expert-level modern C++17 programming.
• Deep understanding of network switch and router architecture, including forwarding tables, scheduling, QoS, and ACLs.
• Experience with packet-processing pipelines, dataplane simulation, and C++ unit-testing frameworks such as Google Test.
• Familiarity with Verilog/SystemVerilog and reading RTL.
• Experience with gRPC, Protocol Buffers, or similar IPC mechanisms, plus Python for test automation and tooling.

Nice to have

• Experience with AI/ML networking, scale-up fabrics, RDMA, or collective operations.
• Experience with ns-3 or HTSim for high-performance network architecture modeling.
• Familiarity with SAI or SONiC.
• Experience with FPGA prototyping, emulation platforms, memory subsystem modeling, or configuration-driven simulation frameworks.

Culture & Benefits

• Work on foundational infrastructure for next-generation AI workloads.
• Environment emphasizing ownership, technical rigor, speed, and high-impact engineering.
• Equal-opportunity workplace with accessibility accommodations available throughout the hiring process.