Sr Engineer I - Validation (Systems)

Location: CA - Roseville, United States. The role involves on-site laboratory work and allows 0%–25% travel.

Annual base salary: $70,304–$205,000, plus restricted stock units and quarterly bonus payments.

Company

hirify.global develops semiconductor products including storage controllers, NVMe SSD controllers, PCIe switches, and SAS expanders for cloud storage and enterprise data centers.

What you will do

• Integrate prototype SoC hardware and firmware into complete system solutions using emulation platforms, validation boards, FPGAs, and software.
• Develop, execute, and document block-, subsystem-, and system-level tests against design specifications, performance targets, and industry standards.
• Build and maintain validation infrastructure, including boards, embedded software, device drivers, firmware, scripts, and automated test suites.
• Perform silicon bring-up, system integration, and complex laboratory investigations on pre-silicon emulation platforms and post-silicon prototype ICs.
• Debug issues across hardware, firmware, schematics, PCB, FPGA, and system layers while collaborating with cross-functional teams to resolve bugs.
• Lead technical activities, mentor junior engineers, train the validation team, and present technical information to internal and external audiences.

Requirements

• At least 5 years of relevant pre-silicon and/or post-silicon SoC validation experience.
• Strong programming and scripting skills in C, C++, and Python or Tcl.
• Hands-on experience with oscilloscopes, protocol analyzers, logic analyzers, and other high-speed test equipment.
• System-level debugging experience across firmware, hardware, schematics, PCB, and FPGA environments.
• Strong understanding of data communications theory and high-speed signal fundamentals.
• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.

Nice to have

• Experience with SoC performance validation, tuning, prototype board bring-up, and schematic reading.
• PCIe compliance testing and high-speed SERDES testing or debugging experience.
• Knowledge of PCIe, DDR4/5, SAS, SATA, I2C, SPI, and protocol trace debugging.
• Experience with product security, AI-based testing tools, Linux or Windows host drivers, FPGA tools, VHDL/Verilog, ThreadX, or other RTOS platforms.
• MIPS-based firmware development and debugging in C or C++.

Culture & Benefits

• Regular business-hours schedule with approximately 70% sitting, 15% standing, and 15% walking.
• Health benefits beginning on the first day of employment.
• Retirement savings plans and an employee stock purchase program with a two-year look-back feature.
• Leadership and employee development programs supporting long-term career growth.
• Compensation package includes base pay, restricted stock units, and quarterly bonus payments.