Verification / Senior Verification Engineer (SystemVerilog)

Location: Cambridge, UK; hybrid

Salary: £60,000–£88,000 per year depending on experience, plus bonus and benefits

Company

hirify.global develops quantum error-correction technology to help make fault-tolerant quantum computing a reality.

What you will do

• Work with designers and architects to define verification plans from design specifications.
• Own detailed test strategies for block-level and system-level designs.
• Develop scalable SystemVerilog testbenches with checkers, reference models, and coverage groups.
• Implement self-testing, directed, and random tests.
• Maintain the verification environment, regression tracking, coverage metrics, and bug reporting.
• Debug issues across RTL, simulation, and hardware.

Requirements

• Commercial experience in functional verification, including ownership of verification planning and strategy.
• Experience designing testbenches with UVM or OVM verification frameworks.
• Knowledge of SystemVerilog assertions (SVA).
• Exposure to programming languages such as C, C++, and Python.
• Ability to define work independently, collaborate effectively, communicate clearly, and provide and receive constructive feedback.
• Ability to work with ambiguity and changing requirements.

Nice to have

• Formal verification experience.

Culture & Benefits

• Annual bonus plan, private medical insurance, life insurance, and contributory pension scheme.
• Equity participation.
• 28 days of annual leave, bank holidays, and enhanced family leave.
• Diverse environment with software, hardware, quantum information theory, physics, and mathematics specialists from over 20 nationalities.
• Learning events, training, and conference budgets.
• Part-time applications may also be considered; preferred schedules should be stated in the cover letter.

Hiring process

• Submit a CV and covering letter.
• Applications are reviewed as they are received, with interviews arranged for suitable candidates.