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17 часов назад

CPU Design Architect / Principal Digital Design Engineer

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
CPU Design Architect / Principal Digital Design Engineer (MIPS CPU): Designing a cost-effective, high-performance, low-power, small-area CPU controller and integrating a MIPS CPU subsystem for cellular modems with an accent on CPU architecture, microarchitecture, and leading-edge process nodes. Focus on analyzing workloads, identifying performance bottlenecks, developing architecture and microarchitecture solutions, and bringing CPU features from research through successful silicon.

Location: Sunnyvale, California, United States

Company

hirify.global.

What you will do

  • Design cost-effective CPU controllers for cellular modems with high performance, low power consumption, and small area.
  • Perform CPU development and design integration for a MIPS CPU subsystem.
  • Research new directions in CPU architecture and evaluate emerging technologies.
  • Analyze workloads, identify performance bottlenecks, and assess CPU design trade-offs using data-driven methods.
  • Derive CPU architecture and microarchitecture concepts for modeling, implementation, and successful silicon delivery.

Requirements

  • Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering.
  • At least 5 years of CPU-related architecture, RTL, verification, or implementation design experience.
  • Knowledge and practical experience with common RISC CPU architectures.
  • Familiarity with digital chip design flows, including RTL integration, simulation, and static timing analysis.
  • Understanding of high-performance CPU techniques and microarchitecture trade-offs.
  • Ability to solve problems and validate original ideas.

Nice to have

  • PhD in Electrical Engineering, Computer Science, or Computer Engineering.
  • 8+ years of CPU-related architecture, RTL, verification, or implementation design experience.
  • Experience with symmetric multiprocessing, snoop-based multiprocessor architectures, synthesis, power analysis, and post-silicon debugging.
  • Cross-site working experience and knowledge of modeling, design verification, and operating systems.
  • Experience with foundry, post-silicon, FPGA, DVT, or SLT debugging.

Culture & Benefits

  • Collaborate with multinational teams.
  • Work with leading-edge process nodes.

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