15 часов назад
PCIe Post-Silicon Validation Engineer (PCIe)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
PCIe Post-Silicon Validation Engineer (PCIe): Performing hands-on post-silicon validation and debugging PCIe link training, LTSSM, equalization, recovery, resets, and link stability with an accent on protocol analysis, signal-integrity measurements, and cross-layer hardware/firmware/software debugging. Focus on driving intermittent and corner-case failures to root cause, validating multiple PCIe generations and platforms, and building automation for stress testing and regression coverage.
Location: Haifa District, Israel
Company
provides rack-scale AI infrastructure through semiconductor-based connectivity solutions and its COSMOS software suite, integrating technologies such as CXL, Ethernet, NVLink, PCIe, and UALink.
What you will do
- Perform hands-on PCIe post-silicon validation across generations, platforms, configurations, and operating conditions.
- Debug link training, LTSSM, equalization, recovery, resets, and link-stability issues.
- Analyze state-machine and protocol traces, registers, logs, eye diagrams, and laboratory measurements.
- Drive complex issues from initial failure through root-cause analysis and final resolution.
- Develop validation plans, stress tests, corner-case scenarios, interoperability tests, and regression automation.
- Collaborate across silicon, firmware, software, architecture, and signal-integrity engineering teams.
Requirements
- BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
- 5+ years of experience in silicon validation, post-silicon debugging, or high-speed interface development.
- Strong hands-on knowledge of PCIe architecture and protocol.
- Experience with PCIe analyzers, state traces, registers, logs, eye diagrams, and/or signal-integrity measurements.
- Experience working across hardware, firmware, and software boundaries, with strong problem-solving and communication skills.
- Good scripting or programming skills, preferably Python, and Linux knowledge including PCIe debug tools.
Nice to have
- Experience with PCIe Gen4, Gen5, Gen6, or Gen7.
- Hands-on experience with PCIe PHY, SerDes, equalization, lane margining, or signal integrity.
- PCIe compliance and interoperability testing experience.
- Experience debugging intermittent, marginal, thermal-sensitive, or corner-case PCIe failures.
- Experience with PCIe switches, networking or accelerator platforms, and AI/ML tools for engineering debug and automation.
Culture & Benefits
- Collaboration with design, architecture, firmware, software, silicon, and signal-integrity engineering teams.
- A diverse and inclusive environment that encourages applications from people with varied backgrounds and experiences.
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