Senior / Principal Signal Integrity Engineer (Photonics)

Location: San Jose, United States

Company

hirify.global is a well-funded startup building photonics infrastructure for AI supercomputing, including co-packaged optics, silicon photonics, and scalable photonic engines.

What you will do

• Lead end-to-end signal integrity analysis and optimization for complex 2.5D/3D photonic-electronic packages.
• Model and simulate electromagnetic behavior in silicon interposers, bridges, chiplet packages, fan-out structures, and advanced substrate designs.
• Analyze high-speed SerDes, parallel buses, UCIe die-to-die links, and hybrid electrical-optical interconnects.
• Optimize package stack-ups, routing, via transitions, bump layouts, and redistribution layers to reduce loss, crosstalk, mode conversion, and impedance discontinuities.
• Collaborate with silicon, photonic IC, system, and power integrity teams on die-to-package co-design and SI/PI targets.
• Correlate simulations with VNA, TDR/TDT, oscilloscope, and BERT measurements while leading technical reviews and design issue closure.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Physics, or a related field; PhD preferred.
• 10+ years of experience in high-speed SI/PI, including board-level, package-level, and silicon-level design and validation.
• Expertise in SerDes at 56G and above, preferably 100G/200G PAM4, including equalization, jitter, crosstalk, eye diagrams, BER, and compliance analysis.
• Hands-on experience with SI/PI/EM tools such as HFSS, SIwave, Clarity, CST, ADS, Sigrity, HSPICE, or HyperLynx.
• Proficiency in transient simulation and automation using Python, TCL, MATLAB, HSPICE, ADS, or Simulink.
• Experience with 2.5D/3D packaging, HBM stacking, high-frequency transmission lines, laboratory measurements, de-embedding, and production hardware development.

Nice to have

• Power integrity co-simulation, SSO analysis, and advanced decap optimization.
• Experience with glass-core substrates, panel-level packaging, optical interconnects, and CPO/NPO architectures.
• Background in EMI/EMC, mechanical, and thermal trade-offs for co-packaged optics.
• Familiarity with advanced process nodes and chiplet standards such as UCIe.

Culture & Benefits

• Competitive salary based on experience.
• Comprehensive benefits package including health insurance.
• Professional development and certification support.
• Access to advanced technology and cloud platforms.
• Collaborative work with cross-functional engineering teams.