Senior Architecture/Performance Modeling Engineer (SystemC)

Company

hirify.global is a well-funded startup building critical photonics infrastructure and optical interconnects for AI supercomputing.

Location: San Jose

What you will do

• Develop SystemC/TLM-2.0 virtual platforms to enable pre-silicon firmware development.
• Create architecture and performance models for datapath latency, throughput, and buffer sizing.
• Build golden reference models to serve as scoreboards for the verification team.
• Develop behavioral models for analog and control circuits.
• Collaborate with FE architects and firmware leads to ensure model and RTL coherence.

Requirements

• 8+ years of experience in architecture/performance modeling or virtual-platform development for complex SoCs.
• Strong proficiency in SystemC, TLM-2.0, and modern C++.
• Proven experience building virtual platforms used for real firmware bring-up.
• Expertise in integrating third-party ISS (e.g., Arm or RISC-V) into SystemC/TLM platforms.
• Ability to balance hardware micro-architecture and embedded software requirements.

Nice to have

• Familiarity with high-speed serial links, chiplet interconnects, and link-layer concepts like FEC or CXL.
• Experience integrating golden models into UVM/DV verification flows.
• Background in modeling mixed-signal or optical/SerDes systems.

Culture & Benefits

• Competitive salary and comprehensive health, dental, and vision benefits.
• Access to cutting-edge technology and cloud platforms.
• Professional development and certification support.
• Collaborative, cross-functional work environment in a high-growth startup.