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Signal Integrity and Power Integrity (SI/PI) Engineer (AI Hardware)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Релокация
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Signal Integrity and Power Integrity (SI/PI) Engineer (AI Hardware) (PCIe/Ethernet/PDN): Designing and validating signal and power integrity for high-speed PCB and system interfaces from architecture through final release with an accent on multi-gigabit links, channel analysis, and power delivery networks. Focus on correlating simulations with lab measurements, optimizing PCB topologies and stack-ups, and debugging signal quality issues across frontier AI hardware.

Location: San Jose, United States; on-site. Relocation support is available for those moving to San Jose.

Company

hirify.global builds frontier AI hardware by co-designing chips, racks, software, and manufacturing systems focused on high-throughput, low-latency inference.

What you will do

  • Own SI/PI methodology for high-speed PCB and system designs from early architecture through final release.
  • Perform pre- and post-layout simulations for PCIe Gen5/Gen6 and 112G/224G Ethernet interfaces.
  • Define channel budgets, topology constraints, trace geometry, stack-up requirements, and via optimization guidelines.
  • Develop COM, IBIS, S-parameter, and SPICE models and correlate simulations with laboratory measurements.
  • Design and analyze power delivery networks, including target impedance, decoupling, AC/DC power, and IR-drop analysis.
  • Support bring-up and debugging, maintain SI/PI compliance checks and simulation-to-hardware correlation databases, and document corrective actions.

Requirements

  • B.S. or M.S. in Electrical Engineering or a closely related discipline.
  • 5+ years of hands-on SI/PI experience with high-speed designs, including serial links above 1 Gbps or DDR4/5 and HBM3/4 interfaces.
  • Proficiency with SI/PI EDA tools such as Cadence Sigrity, Ansys SIwave/HFSS, or Keysight ADS.
  • Strong understanding of transmission-line theory, return loss, insertion loss, crosstalk, eye-diagram analysis, jitter decomposition, PDN modeling, target impedance, and DC IR analysis.
  • Working knowledge of multilayer PCB stack-up design and controlled-impedance trace routing.
  • Hands-on experience with VNA S-parameter measurements, TDR, BERT operation, and oscilloscope probing.

Nice to have

  • Experience with data center, AI/ML accelerator, networking, or HPC hardware.
  • Experience scripting automated SI/PI simulation flows with Python or MATLAB.

Culture & Benefits

  • Fully in-person engineering team based in San Jose and Taipei.
  • Medical, dental, and vision coverage, plus a $500 monthly credit for waiving medical benefits.
  • $2,000 monthly housing subsidy for employees living within walking distance of the office.
  • Relocation support for moves to San Jose.
  • Wellness benefits, daily office lunch and dinner, and an unlimited compute budget subject to ROI justification.

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