обновлено 3 дня назад
Senior Digital Verification Engineer (PMIC)
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Senior Digital Verification Engineer (PMIC): Developing and verifying next-generation power management ICs for automotive and industrial applications with an accent on SystemVerilog, UVM, coverage-driven verification, and formal methodologies. Focus on building reusable verification environments, closing functional and assertion coverage, validating safety and power-management functions, and leading verification signoff.
Location: Chandler, Arizona, USA; office-based
Company
develops secure connectivity and embedded solutions for automotive, industrial, IoT, mobile, and communications infrastructure markets.
What you will do
- Lead digital verification from planning and architecture review through project execution and signoff.
- Define verification plans, methodologies, environments, regressions, coverage goals, and signoff criteria.
- Develop and maintain SystemVerilog and UVM-based verification environments with VIPs, scoreboards, monitors, checkers, and assertions.
- Create directed and constrained-random tests for PMIC digital control, telemetry, diagnostics, safety, power sequencing, fault management, interfaces, and embedded control functions.
- Analyze functional, code, and assertion coverage; drive coverage closure, regression analysis, issue resolution, and requirements traceability.
- Improve verification methodologies and automation while mentoring junior engineers and collaborating across global teams.
Requirements
- BSEE with 8+ years, MSEE with 5+ years, or PhD with 3+ years of semiconductor industry experience.
- Strong understanding of digital design fundamentals, FSMs, CDC, reset architecture, low-power design, and SoC integration.
- Expertise in Verilog, SystemVerilog, UVM/OVM, class-based verification, constrained-random testing, coverage-driven verification, and regression automation.
- Hands-on experience with testbenches, drivers, monitors, scoreboards, assertions, reusable verification IP, SVA, formal verification, and UPF/CPF methodologies.
- Knowledge of AMBA, I²C, SPI, UART, CAN, LIN, DDR, and PCIe protocols, plus Python, Perl, and UNIX/Linux shell scripting.
- Strong analytical, debugging, problem-solving, communication, leadership, mentoring, and cross-functional collaboration skills.
Nice to have
- Experience with FPGA, emulation, or prototyping platforms such as HAPS, Palladium, or Zebu.
- Understanding of PMIC architectures and power management concepts.
- Experience using AI/LLM-based technologies to improve engineering productivity.
Culture & Benefits
- Online and offline learning opportunities support professional and technical development.
- Inclusive work environment with programs focused on diversity, equality, and inclusion.
- Commitment to sustainability and measurable progress toward a more sustainable future.
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