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7 часов назад

Optical Systems Engineer (AI Hardware)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Релокация
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Optical Systems Engineer (AI Hardware): Defining and implementing optical interconnect architectures for next-generation AI accelerator systems with an accent on CPO, NPO, OCI, photonic-electronic co-design, and high-density datacenter infrastructure. Focus on bringing up and debugging optical links, integrating PIC-based subsystems, and transitioning prototypes into volume manufacturing.

Location: On-site in San Jose, United States. Relocation support is available for candidates moving to San Jose.

Company

hirify.global develops inference-focused AI hardware by co-designing chips, racks, software, and manufacturing systems for high throughput and low latency.

What you will do

  • Lead optical link architecture and system design for next-generation accelerator systems.
  • Evaluate and integrate CPO, NPO, OCI, LPO, XPO, and other interconnect technologies into the product roadmap.
  • Drive optical prototypes through definition, validation, and transition to volume production.
  • Partner with Signal Integrity, PCB, ASIC, Thermal, and Mechanical Engineering teams on electrical-optical interfaces for high-performance AI servers.
  • Define multi-rack optical interconnect requirements, including topology, reach, connectors, and fiber management.
  • Bring up and debug optical interfaces using BERTs, sampling scopes, and OSAs, while defining manufacturing test strategies and optics documentation.

Requirements

  • 5–10 years of experience in optical interconnect, transceiver, or photonic system design for high-density compute systems.
  • Expertise in CPO, NPO, OCI, LPO, XPO, and related optical interconnect architectures.
  • Strong optical link engineering fundamentals, including link budgets, IL/RL, OSNR, eye diagrams, jitter, BER, and FEC margining.
  • Working knowledge of laser sources, modulators, TIAs, DSPs, retimers, and 100G/200G-per-lane PAM4 host interfaces.
  • Experience with OSFP and QSFP-DD pluggable solutions, photonic-electronic co-design, advanced packaging, PIC-based subsystems, and optical connectors.
  • Understanding of high-power liquid-cooled AI servers, cluster-scale optical fabrics, and industry standards including OCI, Open CPX, OIF, and UCIe.

Culture & Benefits

  • Fully in-person engineering team based in San Jose and Taipei.
  • Medical, dental, and vision coverage, plus a $500 monthly credit for waiving medical benefits.
  • $2,000 monthly housing subsidy for employees living within walking distance of the San Jose office.
  • Relocation support for moves to San Jose, wellness benefits, and daily lunch and dinner.
  • Unlimited compute budget subject to ROI justification.
  • Engineering and research responsibilities are closely integrated, with technical staff expected to contribute to both.

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