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Principal/Sr Principal Circuit Designer – Analog / SERDES (Automotive Transceivers)

191 500 - 263 300$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Principal/Sr Principal Circuit Designer – Analog / SERDES (Automotive Transceivers) (Analog/SERDES): Designing and delivering high-speed, high-linearity analog and SERDES circuit blocks for automotive transceiver analog front ends with an accent on TX, RX, clocking, and transistor-level optimization. Focus on owning blocks from specification through silicon validation, correlating simulations with measurements, and resolving performance, yield, and reliability issues.

Location: San Jose, California, United States. Hybrid schedule with 3 days in the office and 2 days working from home; 100% remote is not available.

Base salary: $191,500–$263,300 annually. The range applies specifically to California.

Company

hirify.global develops semiconductor solutions, including automotive transceivers and high-speed connectivity technologies.

What you will do

  • Architect, design, and simulate analog front-end blocks for automotive transceivers, including TX, RX, and clocking circuits.
  • Translate system- and PHY-level requirements into block-level specifications and optimize designs for linearity, noise, jitter, power, area, and robustness.
  • Perform transistor-level simulations across PVT corners and full automotive temperature ranges.
  • Support silicon bring-up, characterization, validation, and production support for analog and SERDES blocks.
  • Correlate simulation results with silicon measurements and resolve performance, yield, and reliability issues through root-cause analysis.
  • Own critical analog/SERDES blocks, lead design reviews, influence AFE and PHY architecture, and mentor other designers.

Requirements

  • MSEE, PhD in Electrical Engineering, or equivalent education.
  • 12–15+ years of analog or mixed-signal IC design experience for Principal level, or 15–20+ years for Senior Principal level.
  • Hands-on experience designing high-speed SERDES or wireline analog circuits.
  • Experience delivering TX, RX, and clocking circuits to production silicon.
  • Extensive transistor-level circuit design, simulation, and debugging experience, including advanced CMOS processes and automotive robustness.
  • Ability to work in the San Jose office three days per week.

Nice to have

  • Experience with 10GBASE-T, 10GBASE-T1, or TDD-based transceivers.
  • Familiarity with AEC-Q100, automotive temperature requirements, and EMI/EMC considerations.
  • Experience supporting automotive production ramp and customer qualification.
  • Exposure to ISO 26262 and functional safety concepts.

Culture & Benefits

  • Health, dental, and vision insurance.
  • 401(k) plan and paid leave.
  • Competitive benefits, incentive compensation, and equity for certain roles.
  • Cross-functional collaboration with layout, digital, DSP, systems, test, and product engineering teams.

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