Principal IC Design Verification Engineer (SoC)

TL;DR

Principal IC Design Verification Engineer (SoC): Architecting and verifying breakthrough Ethernet and networking IP for next-generation SoCs in automotive and industrial markets with an accent on UVM verification and hardware-software trade-offs. Focus on designing UVM infrastructures, executing full verification cycles, and debugging complex failures in high-performance networking accelerators.

Location: Must be based in Kanata, Canada

Salary: $137,800 – $189,000 CAD

Company

Central design organization (AI and Chip Engineering) within NXP developing high-performance IP for Automotive, IoT, and Networking products.

What you will do

• Architect, design, and implement UVM verification for hardware IP and System on Chip (SoC) products.
• Develop and execute directed and random verification tests for Ethernet/networking IP.
• Perform thorough trade-off analysis on performance and complexity to optimize IP delivery.
• Debug test failures to determine root causes and collaborate with architects and designers to resolve defects.
• Manage functional and code coverage metrics to ensure requirements are fully met.
• Create detailed functional and implementation specifications for all project phases.

Requirements

• 10+ years of experience in IP and SoC product development.
• Expertise in System Verilog and UVM Verification.
• Proficiency with EDA tools and scripting languages such as Python, TCL, Perl, or Shell.
• Experience architecting Design Verification infrastructure and managing the full verification cycle.
• Bachelor's degree in Computer Science, Engineering, or a related field.
• Location: Must be based in Kanata, Canada

Nice to have

• Familiarity with Formal and Functional Safety Verification.
• Knowledge of TCP/IP protocols and state-of-the-art networking technologies.
• Experience with data products such as routers, bridges, and switches.
• Knowledge of security and cryptography.