Sr Staff Analog Layout Engineer (Semiconductor)

TL;DR

Sr Staff Analog Layout Engineer (Semiconductor): Designing and optimizing complex analog mixed-signal layouts for high-speed SerDes IPs with an accent on floor planning, custom layout, and verification against design rules. Focus on collaborating with circuit designers to meet project specifications and mentoring junior engineers in a strategic expansion site.

Location: Must be based in San Diego, CA

Salary: $129,100–$191,030 per annum

Company

hirify.global is a leading semiconductor company providing essential data infrastructure solutions across enterprise, cloud, and AI architectures.

What you will do

• Design and optimize analog mixed-signal layouts including RX, TX, and PLL.
• Perform floor planning, custom layout, and verification against design rules (DRC, LVS, ANT, LUP, ESD, PERC).
• Collaborate closely with circuit designers to ensure project specifications and timelines are met.
• Maintain detailed documentation of layout methodologies and design decisions.
• Mentor junior engineers and contribute to the technical culture of the San Diego design team.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or related field.
• 4-7 years of professional experience (Bachelor's) or 2-4 years (Master's/PhD).
• Proficiency in CAD tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys Custom Compiler.
• Experience with FinFET technology, preferably TSMC 5nm, 3nm, or 2nm nodes.
• Strong understanding of LVS, DRC, ERC, antenna, EM/IR, and ESD/LUP.
• Must be eligible to access export-controlled information under U.S. law.

Culture & Benefits

• Comprehensive financial well-being programs including an employee stock purchase plan.
• Robust family support and mental health resources.
• Recognition and service awards for contributions.
• Opportunities to work on foundational engineering projects in a strategic expansion site.