DFT Engineer (Semiconductor)

Формат работы

onsite

Тип работы

fulltime

Английский

Страна

China

Вакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:

TL;DR

DFT Engineer (Semiconductor): Defining chip-level DFT architectures and implementing scan, boundary scan, Mem BIST, and Logic BIST schemes with an accent on DFT logic verification and test-pattern development. Focus on simulation, static timing analysis of test modes, and ATE bring-up and debugging.

Location: Shanghai, Zhangjiang Hi-Tech, China; onsite

Company

hirify.global develops semiconductor and technology products.

What you will do

Participate in chip-level DFT architecture definition.
Implement scan, boundary scan, Mem BIST, and Logic BIST schemes.
Verify DFT logic and test patterns through simulation.
Perform static timing analysis for test modes.
Participate in ATE bring-up and debug DFT patterns on ATE.

Requirements

Experience or capability in chip-level DFT architecture, DFT scheme implementation, simulation-based verification, test-mode static timing analysis, and ATE bring-up and debug.

Culture & Benefits

Full-time employment.
Equal opportunity employment is provided in accordance with applicable law.
Candidates located outside the USA must provide a home address for future correspondence.

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