Senior Mixed-Signal Verification Engineer (Space)

TL;DR

Senior Mixed-Signal Verification Engineer (Space): Developing behavioral models and mixed-signal verification methodology for state-of-the-art SoCs used in high-power satellite platforms with an accent on co-simulation and top-level integration. Focus on building robust verification environments, defining methodology from the ground up, and ensuring silicon tapeout success for mission-critical space hardware.

Location: Must be based in Seattle, WA (Onsite). Role requires U.S. Person status due to ITAR export control regulations.

Salary: $160,000 – $230,000

Company

A well-funded Series C space startup building the largest and highest-power satellite platforms for missions ranging from LEO to deep space.

What you will do

• Develop high-level behavioral models for analog and mixed-signal IP including ADCs, DACs, PLLs, and RF front-end blocks.
• Create and maintain regression infrastructure and mixed-signal testbenches for digital-analog co-simulation.
• Integrate AMS models into UVM-based digital verification environments.
• Define and implement the mixed-signal verification methodology for top-level SoC and subsystem verification.
• Collaborate with analog and RF design teams to capture real-world behaviors and ensure accurate behavioral abstractions.
• Provide technical leadership and modeling insights during architectural reviews and silicon bring-up.

Requirements

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in analog/mixed-signal modeling or AMS verification.
• Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent modeling languages.
• Strong understanding of analog/mixed-signal circuits such as PLLs, LDOs, ADC/DACs, and RF/IF paths.
• Experience with mixed-signal co-simulation environments like Cadence AMS Designer or Synopsys VCS AMS.
• Must be a U.S. Person as defined by ITAR regulations.

Nice to have

• Experience building AMS verification methodologies from scratch.
• Familiarity with UVM-based verification and digital design flows.
• Knowledge of signal processing theory, RF system modeling, or communication systems.
• Experience with MATLAB/Simulink, Python modeling, or SystemC AMS.

Culture & Benefits

• Equity in the company.
• Comprehensive benefits package including medical, dental, and vision coverage.
• Paid time off and paid parental leave.
• Life insurance and other perks.
• Fast-paced, collaborative environment focused on groundbreaking space technology.