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16 часов назад

Lead Systems/DSP Engineer (DSP)

180 000 - 250 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Lead Systems/DSP Engineer (DSP): Lead the design of next-generation high-speed (25G+) physical layer (PHY) systems by defining and driving end-to-end DSP architecture from system-level modeling through silicon validation. Focus on solving complex DSP/communication challenges—equalization, echo cancellation, and CDR—while translating advanced algorithms into robust, production-ready mixed-signal silicon.

Company

hirify.global develops Ethernet-based networking technology for software-defined and autonomous vehicles, robotics, and intelligent machines.

What you will do

  • Define and own DSP/system architecture for high-speed transceivers, balancing power, performance, and silicon area.
  • Drive architectural decisions across DSP, analog front-end, and system partitioning; lead system-level trade-offs.
  • Build and maintain high-fidelity transceiver system models using MATLAB/Simulink, Python, and/or C++.
  • Design and optimize equalization (FFE/DFE/MLSD), CDR solutions, echo cancellation, and adaptive DSP algorithms.
  • Translate system requirements into block-level specifications and collaborate with analog/RTL/physical design teams to align models with hardware.
  • Lead pre-silicon to post-silicon correlation, silicon bring-up/characterization, and lab validation/compliance/performance benchmarking.

Requirements

  • MS or PhD in Electrical Engineering or a related discipline.
  • 10+ years of experience in DSP/system architecture for high-speed communication systems.
  • Deep expertise in digital communications theory, including advanced equalization and echo cancellation, CDR algorithms, phase noise characterization/loop dynamics, and channel modeling with nonlinear effects.
  • Hands-on system modeling experience with MATLAB, Simulink, Python, and/or C++.
  • Strong mixed-signal design fundamentals (ADC/DAC architectures, PLL behavior and phase noise analysis, analog front-end/channel modeling).
  • Proven track record driving complex systems from concept to silicon.

Culture & Benefits

  • Hybrid work model.
  • Pre-IPO stock options and competitive base salary.
  • Medical, dental, and vision insurance for employees.
  • Flexible hours and opportunity to expand technology depth and breadth.

Hiring process

  • Principals only (no agencies).

Location: San Jose, CA

Salary: $180,000 - $250,000 per year (base)

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