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5 часов назад

Staff Chemical Mechanical Planarization Engineer (Semiconductor)

133 800 - 255 200$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior/lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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TL;DR

Staff Chemical Mechanical Planarization (CMP) Engineer (Semiconductor): Leading CMP process development and technical strategy for advanced logic technologies with an accent on cross-node standardization and high-volume manufacturing readiness. Focus on resolving complex yield issues, driving process optimization, and collaborating across functional teams to ensure successful technology transfer.

Location: Must be based in or able to work on-site in Hillsboro, Oregon

Salary: $133,800–$255,200 USD

Company

A global leader in semiconductor manufacturing and technology innovation, driving advancements in silicon process and packaging for the AI era.

What you will do

  • Lead CMP process development from concept through high-volume manufacturing implementation.
  • Drive cross-node standardization and best practices to maximize efficiency and yield.
  • Resolve complex CMP-related manufacturing and yield issues using data-driven methodologies.
  • Bridge technology development and manufacturing teams to ensure smooth process transitions.
  • Collaborate with equipment and consumables suppliers to co-develop and optimize CMP solutions.
  • Mentor junior engineers and provide technical leadership across the organization.

Requirements

  • Master's degree in Chemical Engineering, Materials Science, Electrical Engineering, Mechanical Engineering, Physics, or related field.
  • 5+ years of experience in semiconductor manufacturing or process development.
  • 3+ years of direct experience in CMP process development with hands-on tuning and characterization.
  • Experience with major CMP equipment platforms (e.g., AMAT, Ebara).
  • Experience with CMP consumables such as slurries, pads, and conditioning disks.
  • Previous semiconductor foundry experience.

Nice to have

  • Doctorate in a relevant technical field.
  • Experience with advanced technology nodes (sub-10nm) and Gate All Around (GAA) architectures.
  • Experience with CMP integration across other process modules like deposition, lithography, and etch.
  • Background in CMP-relevant metrology and process control.

Culture & Benefits

  • Competitive total compensation package including base pay and stock bonuses.
  • Comprehensive health, retirement, and vacation benefit programs.
  • Hybrid work model allowing for a mix of on-site and off-site work.
  • Opportunity to influence next-generation semiconductor technologies at a global scale.

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