Design Verification Engineer IV (ASIC)

TL;DR

Design Verification Engineer IV (ASIC): Architecting verification environments for ASIC SoC and providing support from verification planning to tapeout with an accent on SV/UVM and complex test bench development. Focus on architecting SoC test firmware, implementing formal verification flows, and leading project teams to solve complex technical challenges.

Location: Must be based in San Jose, CA (On-site)

Salary: $112,200 - $176,000

Company

hirify.global is a global provider of product engineering and semiconductor design services with a history of over two decades and extensive partnerships with major technology leaders.

What you will do

• Architect verification environments for ASIC SoC and define comprehensive verification plans.
• Develop complex self-checking test benches using constraint random stimulus generation.
• Architect and debug SoC test firmware and specific tests in C/C++.
• Implement and maintain integrated end-to-end formal verification flows.
• Partner in methodology development and review functional/technical specifications.
• Lead project teams and provide technical guidance to junior staff.

Requirements

• Minimum 8 years of related experience with a 4-year degree (or 6 years with an advanced degree).
• Must be able to work fully on-site in San Jose, CA.
• Strong expertise in SV/UVM.
• Experience with AXI, NOC, Ethernet, PCIe, or UCIe switch protocols.
• Knowledge of CPU architectures (ARM/RISC-V) and C/C++.
• Proven ability to solve complex problems and work independently.

Culture & Benefits

• Competitive financial compensation and solid benefits package.
• Medical, Dental, and Vision insurance coverage.
• 401k plan with matching contributions.
• Health Savings Account (HSA) and Health Reimbursement Account (HRA) options.
• Paid Time Off including sick leave, holidays, and vacation.
• Tuition reimbursement and growth opportunities.