Назад
Company hidden
1 день назад

Senior Digital IC Designer (Connectivity)

36 000 - 48 000
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Italy
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Senior Digital IC Designer (Connectivity): Designing high-performance connectivity solutions for data centers, cloud, and optical applications with an accent on RTL development for DSP, FEC, and SerDes blocks. Focus on optimizing PPA (power, performance, area), executing functional simulations, and ensuring tapeout quality through synthesis and STA.

Location: Pavia, Italy

Salary: €36,000–€48,000 per annum

Company

Global leader in data infrastructure semiconductor solutions powering networks for leading hyperscalers and telecommunications operators.

What you will do

  • Develop and verify RTL blocks for high-speed connectivity devices, including DSP, FEC, SerDes, and gearboxes.
  • Execute circuit analysis and functional simulations to evaluate performance, area, and power (PPA).
  • Apply internal design methodologies for synthesis, STA, and DFT.
  • Collaborate with Physical Design, Verification, and Product Engineering teams to ensure tapeout quality.
  • Support and mentor junior engineers on project tasks and design methodologies.
  • Document technical results and participate in design reviews and project meetings.

Requirements

  • Master's degree in Electrical, Electronics, or Computer Engineering (or Bachelor's with 1–3 years of professional experience).
  • Hands-on experience in digital RTL design using SystemVerilog, Verilog, or VHDL.
  • Proficiency with EDA tools for synthesis, STA, and simulation (e.g., Synopsys, Cadence).
  • Ability to work in a Linux environment and use scripting languages like Python, Perl, or Tcl.
  • Must be eligible to access export-controlled information under U.S. export control laws (EAR).
  • Strong English communication skills (written and spoken).

Nice to have

  • Experience with high-speed design (SerDes, DSP, FEC, PAM4/Coherent).
  • Knowledge of advanced CMOS process nodes (5nm, 3nm, 2nm).
  • Experience with end-to-end tapeout flows.

Culture & Benefits

  • Collaborative and international work environment.
  • Opportunity to see designs move from RTL through to mass production.
  • Competitive compensation and comprehensive benefits package.
  • Inclusive culture focusing on transparency, shared collaboration, and professional growth.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →