Principal Engineer, Verification

TL;DR

Principal Engineer, Verification (SoC Design Verification): Lead functional logic verification for complex integrated SoCs by defining verification plans, building reusable test benches and environments, and validating designs via emulation and system simulation. Focus on scalable verification strategy, presilicon root-cause debugging, and integrating security coverage into regression and debug workflows.

Company

hirify.global builds semiconductor and engineering solutions across product enablement, custom ASIC, and foundry enablement.

What you will do

• Define and develop scalable, reusable block/subsystem/SoC verification plans, test benches, and environments aligned with microarchitecture specifications.
• Execute verification plans and run emulation and system simulation models to validate designs against power and performance goals while identifying and resolving bugs.
• Investigate, root-cause, and debug issues in presilicon environments and implement corrective measures for failing tests.
• Collaborate with SoC architects, microarchitects, RTL developers, postsilicon, and physical design teams to improve verification of architectural and microarchitectural features.
• Document test plans and lead technical reviews to ensure alignment with design and architecture teams.
• Incorporate security activities into verification workflows (regression and debug tests) and maintain/improve verification infrastructure and methodology.

Requirements

• Location: Must live and work from the country specified in the job posting (United States).
• Bachelor’s (or BS) in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+ years of industry experience.
• Proficiency in SystemVerilog, OVM, and UVM for verification environment and test bench development.
• Expertise in SoC functional logic verification, including DFV, test content development, and test planning.
• Extensive experience with debugging, hardware simulation, and hardware validation techniques.
• Strong root-cause analysis capability and ability to implement corrective measures for pre-silicon failures.

Nice to have

• Master’s degree (12+ years) or PhD (8+ years) in a related field.
• Leadership experience mentoring, coaching, and building technical teams.
• Experience influencing technical direction across the semiconductor industry.
• Clear communication skills for presenting complex technical concepts to technical and non-technical audiences.

Culture & Benefits

• Fully home-based role with occasional hirify.global site attendance based on business need.
• Total compensation package including competitive pay, stock bonuses, and benefits (health, retirement, vacation).
• Annual salary range for US-located roles: $220,920–$311,890 USD.
• Position of Trust requiring an extended background investigation.

Hiring process

• Application review and interviews to assess technical depth, verification strategy, and cross-functional collaboration.
• Background investigation steps as required for the Position of Trust.