Senior Mixed-Signal Verification Engineer (Aerospace)

TL;DR

Senior Mixed-Signal Verification Engineer (Mixed-Signal SoC): Creating behavioral modeling and driving mixed-signal verification methodology for state-of-the-art satellite SoCs with an accent on top-level integration and silicon tapeout success. Focus on developing high-level behavioral models for analog/mixed-signal IP and building regression infrastructure for co-simulation.

Location: Remote (United States). Must be a 'U.S. Person' as defined by ITAR regulations.

Salary: $160,000 – $230,000 + equity

Company

hirify.global is a Series C startup mass-producing the highest-power satellite platforms for missions from LEO to deep space.

What you will do

• Develop behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end) using Verilog, Verilog-AMS, or SystemVerilog.
• Build regression infrastructure and mixed-signal testbenches enabling digital and analog co-simulation.
• Integrate AMS models into UVM-based digital verification environments.
• Define and establish the mixed-signal verification methodology for top-level SoC and subsystems.
• Collaborate with analog/RF designers to translate real-world behaviors into accurate behavioral abstractions.
• Provide technical leadership and verification insights during architectural reviews, PDR/CDR, and silicon bring-up.

Requirements

• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in analog/mixed-signal modeling and/or AMS verification.
• Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent languages.
• Strong understanding of analog/mixed-signal circuits including PLLs, LDOs, ADC/DACs, and RF/IF paths.
• Experience with mixed-signal co-simulation environments such as Cadence AMS Designer or Synopsys VCS AMS.
• Must be a 'U.S. Person' (citizen, lawful permanent resident, or protected individual) per ITAR export control regulations.

Nice to have

• Experience building AMS verification methodologies from scratch.
• Familiarity with UVM-based verification and digital design flows.
• Knowledge of signal processing theory, RF system modeling, or communication systems.
• Experience with MATLAB/Simulink, Python modeling, or SystemC AMS.

Culture & Benefits

• Competitive base salary and company equity.
• Comprehensive medical, dental, and vision insurance.
• Paid time off and paid parental leave.
• Life insurance and other corporate perks.
• Opportunity to work in a fast-paced, high-impact Series C space startup environment.