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2 дня назад

Principal DSP Engineer (Semiconductors)

166 520 - 249 500$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Principal DSP Engineer (Semiconductors): Design and simulate DSP architectures and FEC hardware specifications for high-speed wireline Ethernet communication with an accent on equalization and timing synchronization. Focus on developing behavioral models for transceivers and solving complex signal processing challenges for Base-T, SerDes, and optical channels.

Location: Santa Clara, CA. Applicants must be eligible to access US export-controlled information (EAR)

Expected Base Pay Range: $166,520 - $249,500 per annum

Company

hirify.global develops semiconductor solutions that serve as the building blocks for data infrastructure across cloud, AI, and carrier architectures.

What you will do

  • Design and simulate DSP architectures, defining key capabilities and performance requirements for analog and digital designers.
  • Create detailed DSP and FEC hardware block specifications for RTL implementation.
  • Conduct research in digital signal processing for Base-T, SerDes, and optical channels.
  • Develop behavioral modeling of mixed-signal circuit designs for transceivers.
  • Collaborate with designers to ensure efficient circuit architecture implementation.
  • Support chip lab bring-up and provide guidance on test plans for lab characterization.

Requirements

  • Ph.D. or M.S. in Electrical Engineering, Computer Science, or related fields.
  • 3+ years of related design experience.
  • Strong knowledge of communications theory, system design, and digital signal processing.
  • Proficiency in C/C++ and Matlab or Python.
  • Eligibility to access US export-controlled information (EAR).

Nice to have

  • Familiarity with Ethernet systems.
  • Experience in high-speed DSP, specifically FFE/DFE, Clock and Data Recovery (CDR), or FEC (RS, soft decoding, Viterbi).
  • Experience with ADC-based wireline transceivers or coherent DSP architectures.
  • Knowledge of high-speed/time interleaved ADC and associated calibration algorithms.

Culture & Benefits

  • Comprehensive benefits focusing on financial well-being, family support, and health.
  • Employee stock purchase plan with a 2-year look-back.
  • Robust mental and physical health resources.
  • Recognition and service awards.

Hiring process

  • Standard interview evaluations of experience and communication skills.
  • Strict prohibition of AI tools (transcription apps, ChatGPT, Copilot) during interviews.

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