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R&D Engineer (AI/HPC)

167 500 - 268 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
R&D Engineer (AI/HPC): Developing advanced multi-chip semiconductor packaging and system-in-package assembly technologies for artificial intelligence and high-performance computing modules with an accent on manufacturability, reliability, yield, and process integration. Focus on leading technology roadmaps, solving packaging and assembly problems, qualifying new technologies, and coordinating transfers from R&D to high-volume manufacturing.

Location: USA-CA San Jose Innovation Drive

Annual base salary: $167,500–$268,000

Company

hirify.global.

What you will do

  • Lead multi-chip semiconductor assembly and system pathfinding for leading-edge artificial intelligence and high-performance computing modules.
  • Own portions of the advanced packaging, assembly, and system technology roadmaps, driving new assembly technology from early R&D through new product introduction.
  • Define technology requirements, roadmaps, evaluation plans, and qualification plans, and provide hands-on applications support during the transition from process R&D to product development.
  • Lead advanced packaging technology problem solving, design enablement, and product enablement.
  • Manage projects independently from concept through transfer to high-volume manufacturing while coordinating with system customers, IC design and validation teams, foundries, and OSATs.
  • Assess risks and coordinate cross-functional risk mitigation across multiple parallel projects.

Requirements

  • MSEE in Electrical Engineering or a related field with 15+ years of experience in semiconductor process technology, advanced packaging, and manufacturing, specifically in R&D and integration roles; or a PhD with 12+ years of experience in semiconductor process technology and manufacturing, specifically in R&D and integration roles.
  • Broad knowledge of advanced packaging, assembly, and silicon process technologies, including thermal solutions, power delivery, and electrical and optical communication.
  • Experience designing serial and parallel interfaces for chip-to-chip communication within modules and external module communication.
  • Experience with parametric and yield data analysis and proficiency with statistical data analysis tools.
  • Experience with yield failure mechanisms and root-cause analysis tools, including EFA and PFA.
  • Experience with thermal and stress simulation tools.
  • Exceptional data analysis, problem-solving, and interpersonal skills.

Culture & Benefits

  • Full-time employment with medical, dental, and vision plans.
  • 401(k) participation with company matching and an Employee Stock Purchase Program.
  • Discretionary annual bonus and new-hire and annual equity awards, subject to applicable plans and agreements.
  • Company-paid holidays, paid sick leave, vacation time, and applicable paid family and other leaves of absence.
  • Employee Assistance Program.

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