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обновлено 6 дней назад

Senior SoC Chiplet Architect

164 470 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

Текст:
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TL;DR
Senior SoC Chiplet Architect (Chiplet-Based Networking SoCs): Defining multi-generation chiplet-based SoC architectures for hyperscale data centers, cloud infrastructure, and AI workloads with an accent on chiplet partitioning, die-to-die interconnects, and system-level PPA, cost, and yield tradeoffs. Focus on designing scalable multi-die topologies, cross-chiplet QoS and coherency, power and boot infrastructure, and RAS, debug, and telemetry architectures.

Location: Hybrid role based at an assigned hirify.global site in the United States, with primary locations in Santa Clara, California, and additional locations in Phoenix, Arizona; Folsom, California; Fort Collins, Colorado; Hillsboro, Oregon; and Austin, Texas.

Salary: $164,470–$269,100 annual USD, depending on location, skills, experience, and education.

Company

hirify.global develops semiconductor and computing technologies, including networking silicon for hyperscale data centers, cloud infrastructure, and AI workloads.

What you will do

  • Define multi-generation chiplet architecture strategies, roadmaps, and monolithic-versus-chiplet decision frameworks.
  • Lead partitioning and resource-scaling studies across compute, networking/I/O, accelerators, memory, security, and management chiplets.
  • Architect high-bandwidth, low-latency die-to-die interconnects with QoS, flow control, reliability, and error-handling mechanisms.
  • Define chiplet-aware power, clock, reset, boot, telemetry, debug, and manufacturing infrastructure.
  • Develop cross-chiplet RAS, error containment, recovery, crashdump, observability, and post-silicon debug policies.
  • Lead quantitative tradeoff studies and align architecture, RTL, DV, firmware/software, packaging, manufacturing, and platform teams.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related STEM field.
  • 7+ years of experience in SoC or system architecture, from requirements definition through silicon execution.
  • Experience with multi-die or chiplet partitioning and related D2D, boot/reset, cross-domain QoS, and debug implications.
  • Experience running architecture tradeoff studies and communicating decisions to senior technical and business stakeholders.
  • Architecture fundamentals in interconnects or fabrics, memory subsystems, performance modeling, and PPA tradeoffs.

Nice to have

  • Knowledge of chiplet interoperability standards and ecosystem discussions.
  • Experience with system bring-up, architecture-driven debug, and telemetry planning across complex SoCs.
  • Experience building or using cost and yield models for architectural decisions.

Culture & Benefits

  • Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
  • Competitive compensation package with stock bonuses.
  • Health, retirement, vacation, and family benefits.
  • Work on networking silicon and infrastructure for data center and AI workloads.

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