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4 дня назад

Senior SoC Chiplet Architect (Networking)

164 470 - 269 100$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

Senior SoC Chiplet Architect (Networking): Defining and leading the architecture strategy for multi-generation, chiplet-based SoC platforms targeting next-generation data center workloads with an accent on chiplet partitioning, die-to-die interconnects, and system-level PPA trade-offs. Focus on driving modular, scalable SoC design approaches, including cross-chiplet coherency, system infrastructure, and RAS/security architectures.

Location: Hybrid role, must be based in the US (Santa Clara, Phoenix, Folsom, Fort Collins, Hillsboro, or Austin).

Salary: $164,470–$269,100 USD

Company

hirify.global is a global leader in technology innovation, building scalable engineering solutions for data centers, cloud infrastructure, and custom silicon.

What you will do

  • Define the monolithic vs. chiplet decision framework and multi-generation roadmap.
  • Drive functional partitioning across chiplets, balancing PPA, bandwidth, and product flexibility.
  • Architect D2D communication for high bandwidth, low latency, and reliability.
  • Define coordinated power delivery, clock/reset distribution, and boot flows across chiplets.
  • Lead quantitative trade studies across performance, power, area, cost, and yield.
  • Drive cross-functional alignment across architecture, RTL, DV, FW/SW, and packaging teams.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related STEM field.
  • 7+ years of experience in SoC/system architecture and end-to-end silicon execution.
  • Proven experience with multi-die/chiplet partitioning and associated system implications.
  • Ability to run architecture trade-off studies and communicate decisions to senior stakeholders.
  • Must be eligible to work in the United States.

Nice to have

  • Familiarity with industry standards for chiplet interoperability.
  • Hands-on experience with system bring-up flows and architecture-driven debug.
  • Architecture fundamentals in interconnects, memory subsystems, and performance modeling.
  • Experience building cost/yield models for architectural decision-making.

Culture & Benefits

  • Competitive total compensation package including stock bonuses.
  • Comprehensive health, retirement, and vacation programs.
  • Hybrid work model allowing flexibility between on-site and off-site work.
  • Opportunity to work on industry-leading high-performance networking silicon.

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