FPGA Design Engineer

TL;DR

FPGA Design Engineer (Embedded/Networking): Designing and implementing high-speed digital logic for FPGA-based networking products with an accent on low-latency performance and timing closure. Focus on integrating complex interfaces like PCIe and Ethernet, performing functional simulation, and supporting platform validation in a lab environment.

Location: Dublin, Ireland (Onsite)

Company

hirify.global is an industry leader in data-driven, client-to-cloud networking solutions for large data centers, campus, and routing environments.

What you will do

• Design and implement digital logic using VHDL for FPGA-based systems.
• Develop and optimize high-speed, low-latency designs targeting AMD/Xilinx Ultrascale Plus devices.
• Integrate FPGA modules with embedded systems and high-speed interfaces such as PCIe, Ethernet, HBM, and DDR4.
• Perform functional simulation, synthesis, place-and-route, and timing analysis using EDA tools.
• Support platform bring-up, validation, and debugging in the lab using oscilloscopes and logic analyzers.
• Create and maintain technical documentation, including design specifications and test plans.

Requirements

• Bachelor’s or higher degree in Electrical or Computer Engineering.
• 5+ years of experience in FPGA or ASIC design and development.
• Proficiency in hardware description languages such as VHDL or Verilog.
• Strong understanding of digital logic, high-speed design, and timing closure.
• Experience with FPGA development tools like Vivado or Quartus.

Nice to have

• Familiarity with scripting languages like Tcl or Python for automation.
• Knowledge of version control systems such as Git.
• Understanding of Ethernet and the OSI layer model.

Culture & Benefits

• Work in an award-winning engineering environment recognized for diversity and work-life balance.
• Collaborate with cross-functional teams in a high-innovation networking company.
• Access to cutting-edge development tools and workflows.
• Commitment to professional excellence and continuous process improvement.