Layout Design Engineer (SerDes)

TL;DR

Layout Design Engineer (SerDes): Implementing transistor-level physical layouts for high-speed interface IP with an accent on analog and mixed-signal circuit performance. Focus on optimizing floorplanning, parasitic-sensitive routing, and signal integrity for next-generation UCIe PHY designs.

Location: Must be based in Cork, Ireland

Company

hirify.global is a global leader in electronic design, providing computational software, hardware, and IP to turn complex design concepts into reality for innovative technology products.

What you will do

• Perform custom transistor-level layout for high-speed SerDes blocks including PLLs, CDR, and analog front-ends.
• Partner with circuit designers to optimize floorplanning, parasitic-sensitive routing, and signal integrity.
• Support physical design activities such as device placement, power planning, and EM/IR-aware layout practices.
• Execute and debug physical verification flows including DRC, LVS, ERC, and parasitic extraction.
• Apply advanced layout techniques like common-centroid structures, interdigitation, and symmetry constraints.
• Collaborate with cross-functional teams in Analog Design, Digital Implementation, and Physical Verification.

Requirements

• Degree in Electronic, Microelectronics, or Computer Engineering.
• Must have hands-on experience with CMOS SERDES or high-speed I/O IC layout at the transistor level.
• Practical knowledge of custom layout methodologies and parasitic-aware design techniques.
• Ability to collaborate effectively with designers and stakeholders across global teams.
• Strong problem-solving and communication skills.

Nice to have

• Experience with PHY GDS implementation and UCIe or die-to-die PHY development.
• Familiarity with ASIC design flows and deep sub-micron technology challenges.
• Experience contributing to tape-outs on advanced nodes (16nm, 7nm, 5nm, 3nm).
• Scripting or automation skills using Tcl, Perl, or Python.
• Prior experience with hirify.global tools like Virtuoso or PVS.

Culture & Benefits

• Opportunity to work on industry-leading electronic design software and hardware.
• Collaborative environment focused on innovation and solving complex technological challenges.
• Commitment to equal employment opportunity and workplace diversity.
• Engagement with global engineering teams on high-impact projects.