Project Design Lead (EX, AI)

Location: San Jose, California, United States; hybrid work with telecommuting permitted up to 3 days per week

Salary: $188,760 per year

Company

hirify.global is a semiconductor company developing and manufacturing integrated circuit products and digital design solutions.

What you will do

• Design digital logic circuits, including finite state machines, control logic, datapath components, and interface blocks for mixed-signal ICs.
• Translate system and product requirements into digital architectures, block specifications, micro-architectures, and implementation documentation.
• Perform RTL verification using lint, CDC, RDC, simulation, synthesis, timing analysis, and PVT validation.
• Develop behavioral models for analog and mixed-signal components using SystemVerilog and Verilog-A.
• Build FPGA prototypes, conduct application-level functional tests, and collaborate with firmware teams on pre-silicon validation.
• Analyze post-silicon measurements and simulation data, identify root causes, and develop AI/ML tools for verification automation, debugging, test generation, and RTL quality improvement.

Requirements

• Master’s degree in Electrical Engineering, Computer Engineering, or a related field with 2 years of experience in digital IC design and verification; alternatively, a bachelor’s degree with 4 years of relevant experience.
• At least 2 years of experience designing and verifying digital circuits for mixed-signal chip products.
• Experience with Cadence Xcelium, RTL debugging, code coverage analysis, and verification environment setup.
• Experience with digital function design, Verilog or SystemVerilog RTL design, and static checks including lint, CDC, and RDC.
• Experience with FPGA prototyping, pre-silicon validation, post-silicon debugging, and AI/ML tools for digital design automation.
• Ability to work in the San Jose, California area, with telecommuting available up to 3 days per week.

Culture & Benefits

• Full-time employment from Monday through Friday, 40 hours per week.
• Collaboration with analog designers, system engineers, software developers, firmware teams, and CAD/methodology engineers.
• Equal-opportunity and inclusive workplace with employee resource groups and accessibility support during recruitment.