Senior Analog Engineering Manager (DDR5/DDR6 PHY)

Location: Johns Creek, GA, USA; onsite role with no remote work available.

Company

hirify.global is an embedded semiconductor solution provider developing technology for automotive, industrial, infrastructure, and IoT applications.

What you will do

• Lead the architecture, design, implementation, and end-to-end delivery of DDR5 PHYs while contributing to DDR6-ready architectures.
• Provide technical oversight for high-speed TX/RX datapaths, equalization, termination, training circuits, DLL/PLL clocking, voltage references, and power-aware I/O design.
• Drive timing, jitter, noise, signal integrity, power integrity, and PVT robustness for multi-gigahertz DDR5/DDR6 data rates.
• Lead post-silicon bring-up, characterization, debugging, yield improvement, and lab or customer-system correlation.
• Build, mentor, and scale a team of analog and mixed-signal designers, including hiring and development planning.
• Own program execution, cross-functional collaboration, design methodologies, signoff quality, and the DDR5 sustainment and DDR6 technology roadmap.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering; a PhD is preferred.
• 12+ years of analog or mixed-signal IC design experience focused on high-speed memory interfaces.
• 5+ years of people-management and technical leadership experience.
• Hands-on delivery experience with DDR5 PHYs or late-stage DDR4 designs transitioning to DDR5.
• Strong expertise in high-speed I/O design, signal integrity, PLL/DLL and low-jitter clocking, mixed-signal verification, silicon validation, and advanced CMOS process considerations.
• Ability to collaborate with digital PHY, controller, SoC, package, PCB, SI/PI, validation, product, program, foundry, IP vendor, standards, and customer organizations.

Nice to have

• Direct involvement in DDR6 architectural studies or early-stage development.
• Experience with advanced nodes such as 7nm, 5nm, and below.
• Background in multi-generation memory PHYs or scalable PHY platforms.
• Experience leading multiple concurrent tape-outs and communicating with technical and executive audiences.

Culture & Benefits

• Collaborative culture grounded in transparency, agility, global collaboration, innovation, and entrepreneurship.
• Opportunity to work with a global organization of more than 21,000 engineers and problem solvers across over 30 countries.
• Competitive benefits package provided alongside salary.
• Equal opportunity and affirmative action workplace committed to diversity and inclusion.