DSP Architecture Engineer (AI)

TL;DR

DSP Architecture Engineer (AI): Designing and optimizing next-generation serial-link transceivers for electrical and optical applications with an accent on 100G+ data rates. Focus on developing DSP algorithms, behavioral models for mixed-signal systems, and integrating them into 5nm-2nm semiconductor technologies.

Location: Pavia, Italy

Salary: 47,300 - 63,000 EUR per annum

Company

hirify.global is a semiconductor solutions provider creating essential building blocks for data infrastructure across enterprise, cloud, and AI architectures.

What you will do

• Design and simulate DSP architectures and define key capabilities and performance requirements.
• Develop DSP algorithms and behavioral models for mixed-signal systems.
• Perform R&D activities specifically for SerDes and optical channels.
• Collaborate with analog, digital, and firmware designers to ensure efficient circuit implementation.
• Participate in cross-functional teams for bring-up, validation, and optimization activities.

Requirements

• Master’s degree or PhD in Communication Engineering, Electrical Engineering, or related fields.
• Deep understanding of digital communication and signal processing theory.
• Strong experience in communication system modeling and simulation.
• Proficiency in Matlab, Python, C, or C++.
• Must be eligible to access export-controlled information under U.S. export control laws.

Nice to have

• 2-5 years of experience with DSP architecture and algorithm development.
• Knowledge of optical communication systems.
• Experience in high-speed DSP and Clock and Data Recovery (CDR).
• Understanding of the digital implementation of DSP.

Culture & Benefits

• Competitive compensation package.
• Collaborative, transparent, and inclusive work environment.
• Opportunity to work with cutting-edge 5nm, 3nm, and 2nm semiconductor technologies.
• Focus on purposeful innovation in AI and Datacenter bandwidth growth.