Senior Staff Hardware Design Engineer (SI/PI)

TL;DR

Senior Staff Hardware Design Engineer (SI/PI): Leading the design and development of high-speed validation boards for 224G and 448G PAM systems with an accent on Signal Integrity (SI) and Power Integrity (PI) optimization. Focus on performing system-level validation, correlating simulation with lab measurements, and ensuring compliance with IEEE/OIF standards for complex semiconductor infrastructure.

Location: Singapore (Onsite)

Company

hirify.global is a leading semiconductor company providing essential data infrastructure solutions across enterprise, cloud, AI, and carrier architectures.

What you will do

• Lead the design and development of high-speed validation boards supporting 224G and 448G PAM systems.
• Collaborate with SI/PI, package, schematic, and layout teams to meet system performance targets.
• Perform system-level validation and correlate simulation results with lab measurements.
• Define, analyze, and optimize end-to-end channel performance across PCB, package, and interconnects.
• Incorporate SI and PI considerations into hardware design from early development stages.
• Contribute to design methodologies, guidelines, and best practices for high-speed hardware development.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• Typically 5–10 years of experience in hardware design.
• Strong fundamentals in schematic, layout, and hardware debug.
• Experience with high-speed interfaces such as PAM4, DDR, and PCIe.
• Solid understanding of Signal Integrity and Power Integrity fundamentals.
• Hands-on lab experience with oscilloscopes, VNA, and measurement correlation.
• Must be eligible to access export-controlled information under U.S. law.

Culture & Benefits

• Competitive compensation and comprehensive benefits package.
• Environment focused on collaboration, transparency, and inclusivity.
• Access to leading-edge technology and complex design challenges.
• Opportunities for professional growth and development within a global engineering team.