Analog Layout Engineer (Semiconductor)

TL;DR

Analog Layout Engineer (Semiconductor): Developing and verifying precision analog circuits for data infrastructure with an accent on Cadence Virtuoso simulations and high-speed circuit implementation. Focus on full development cycle ownership from floorplanning to delivery of functional blocks and full-chip interfaces.

Location: Singapore (Onsite)

Company

hirify.global provides essential semiconductor solutions for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

• Run simulations and verifications using Cadence Virtuoso to refine and debug analog designs iteratively.
• Manage the full development cycle, including floorplanning, layout, verification, delivery, and support.
• Develop a range of components from individual cells and functional blocks to higher-level macros and full chip interfaces.
• Collaborate with global teams across Argentina, Singapore, the U.S., and Europe.
• Act as a technical mentor within the layout team and participate in broader project lifecycle meetings.

Requirements

• Degree in Electrical Engineering (graduate or undergraduate).
• Proficiency in CAD tools for implementation and microelectronic layers.
• Track record of delivering high-speed or precision analog circuits, preferably across multiple process nodes.
• Excellent communication skills for presenting status updates to global teams across different time zones.
• Must be eligible to access export-controlled information as defined under U.S. export control laws (EAR).

Culture & Benefits

• Competitive compensation and comprehensive benefits package.
• Environment of shared collaboration, transparency, and inclusivity.
• Focus on professional growth, continuous learning, and enduring innovation.
• Access to high-end tools and resources to support impactful engineering work.