Digital Verification Engineer Expert (ASIC)

TL;DR

Digital Verification Engineer Expert (ASIC): Verify functional blocks, cores, and subsystems for Wavelogic optical transmission products with an accent on simulation, formal, and coverage methods. Focus on implementing innovative verification strategies, debugging sophisticated issues, and ensuring comprehensive subsystem validation.

Location: Rochester NY office (New York)

Salary: $147,100 - $234,900 annually

Company

Global leader in high-speed connectivity and optical fiber transmission solutions.

What you will do

• Understand architecture and requirements to collaborate with systems engineers and architects.
• Validate entire subsystems using simulation, formal, and coverage methods.
• Create, review, and optimize simulation environments, test scenarios, functional coverage, and formal verification plans.
• Lead verification groups or mentor individuals, manage priorities and schedules.
• Possibly serve as ASIC Verification Prime, overseeing Serdes digital verification and participating in design reviews.

Requirements

• Bachelor’s degree in Electrical/Computer Engineering, Computer Science or equivalent with expert experience in SystemVerilog, UVM, SVA, and major simulators.
• Proven ability to determine comprehensive digital verification and coverage strategies.
• Highly motivated self-starter, independent worker, great teammate.
• Ability to debug sophisticated technical problems methodically.
• Excellent written and oral English communication skills.

Nice to have

• Formal verification methods.
• DSP and/or Forward Error Correction experience.
• Jira for bug tracking, GIT for source control.
• Programming: Python, Make, bash, OOP, C, C++.

Culture & Benefits

• Flexible work environment prioritizing growth, well-being, and belonging.
• Comprehensive benefits: medical, dental, vision, 401(K) with matching, ESPP, EAP.
• Paid holidays, sick leave, vacation, Paid Family Leave compliance.
• People-first culture with focus on diversity and inclusion.